Patents by Inventor Wei Hsin

Wei Hsin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178402
    Abstract: A negative electrode and a battery employing the same are provided. The negative electrode includes a negative electrode active layer and a protective layer. The protective layer is disposed on the negative electrode active layer, wherein the protective layer includes a nanopowder and a binder. The nanopowder has a specific surface area of 30 m2/g to 1,000 m2/g. The nanopowder has a binding energy less than or equal to ?2.5 eV. The weight ratio of the nanopowder to the binder is from 51:49 to 99:1. The nanopowder is a compound having a structure represented by Formula (I) MiXj??Formula (I) wherein M is Al, Mg, Zr, Zn, or Si, and X is O or N; i is 1, 2 or 3, and j is 1, 2, 3 or 4.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chun-Lung LI, Wei-Hsin WU, Chia-Chen FANG, Deng-Tswen SHIEH, Hao-Tzu HUANG
  • Patent number: 11996058
    Abstract: A display device is provided and includes a display panel, a light source, a light source controller, and a timing controller. The light source is adjacent to the display panel. The light source controller is electrically connected to the light source. The timing controller is electrically connected to the light source controller and the display panel. The timing controller includes a decoding unit and first and second processing units. The first processing unit is electrically connected to the decoding unit and the display panel. The second processing unit is electrically connected to the decoding unit and the light source controller. The decoding unit provides a refresh signal to the first and second processing units so that the display panel refreshes displayed content in a first refresh sequence according to first refresh rates, and the light source refreshes brightness in a second refresh sequence according to second refresh rates.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 28, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Huang-Chi Chao, Wei-Cheng Tsai, Ming-Chi Weng, Yu-Hsin Feng, Cheng-Tso Hsiao, Ming-Feng Hsieh, Chien-Hung Chan
  • Patent number: 11994970
    Abstract: A diagnostic system applied to an electronic equipment with a plurality of hardware devices is provided. The hardware devices include a display and a processor, the diagnostic system is executed by the processor to diagnose the hardware devices. The diagnostic system includes a diagnostic test interface, which is displayed on the display and includes a plurality of hardware items corresponding to the hardware devices. Each of the hardware items links to the hardware devices. When at least one of the hardware items is triggered, the processor executes the diagnostic item of the hardware device corresponding to the triggered hardware item.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: May 28, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Kun-Hsin Chiang, Hsin-Hui Huang, Wei-Hsian Chang, Wen-Yen Hsieh, Ming-Yi Huang, Yu-Chieh Chang, Tang-Hui Liao, Chih-Wei Kuo
  • Publication number: 20240170551
    Abstract: A semiconductor device includes a semiconductor substrate, a control gate, a select gate, a charge trapping structure, a dielectric structure, and a spacer. The control gate and the select gate are over a channel region of the semiconductor substrate and separated from each other. The charge trapping structure is between the control gate and the semiconductor substrate. The dielectric structure is between the select gate and the semiconductor substrate. The dielectric structure has a first part and a second part, the first part is between the charge trapping structure and the second part, and the second part is thicker than the first part. The select gate is between the spacer and the control gate, and the select gate is separated from the spacer by the second part of the dielectric structure.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Han LIN, Wei-Cheng WU, Te-Hsin CHIU
  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11975958
    Abstract: An automatic fluid replacement device is adapted to be mounted on an opening of a storage barrel. The automatic fluid replacement device includes a robotic arm, at least one fluid convey joint and a controller. The robotic arm has a gripper. The fluid convey joint includes a convey pipe, a sleeve and a sealing bag. The convey pipe is configured to deliver a fluid. The sleeve is sleeved on the convey pipe. The gripper clamps the sleeve. The sealing bag is sleeved on the sleeve. The controller is configured for automatically controlling the robotic arm to move the fluid convey joint into the opening and controlling the sealing bag to be inflated to seal the opening.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: May 7, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Han Tsai, Wei-Lung Pan, Chih-Ta Wu, I-hsin Lin
  • Publication number: 20240134279
    Abstract: A photoresist includes a solvent, a polymer and an additive. The polymer is dissolved in the solvent, and the additive is dispersed in the solvent. The additive includes a double bond or includes an epoxy group. The additive has a surface tension different from a surface tension of the polymer.
    Type: Application
    Filed: March 27, 2023
    Publication date: April 25, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chieh-Hsin HSIEH, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20240124715
    Abstract: A biomass treatment method includes steps as follows. A biomass and sodium percarbonate are provided, wherein the biomass includes hemicellulose, cellulose and/or lignin. The biomass and the sodium percarbonate are mixed.
    Type: Application
    Filed: March 7, 2023
    Publication date: April 18, 2024
    Applicant: National Cheng Kung University
    Inventors: Wei-Hsin Chen, Kuan-Ting Lee
  • Patent number: 11961808
    Abstract: At least some embodiments of the present disclosure relate to an electronic package structure. The electronic package structure includes an electronic structure, a wiring structure disposed over the electronic structure, a bonding element connecting the wiring structure and the electronic structure, and a reinforcement element attached to the wiring structure. An elevation difference between a highest point and a lowest point of a surface of the wiring structure facing the electronic structure is less than a height of the bonding element.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Jen Wang, Po-Jen Cheng, Fu-Yuan Chen, Yi-Hsin Cheng
  • Publication number: 20240120288
    Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a substrate, an encapsulant and an electronic component. The encapsulant is disposed over the substrate, and has a first top surface, a second top surface and a first lateral surface extending between the first top surface and the second top surface. A roughness of the first lateral surface is less than or equal to a roughness of the second top surface. The electronic component is disposed over the second top surface of the encapsulant and electrically connected to the substrate.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Hsin LAI, Chih-Cheng LEE, Shao-Lun YANG, Wei-Chih CHO
  • Publication number: 20240118522
    Abstract: A photographing lens assembly includes, in order from an object side to an image side: a first, a second, a third, a fourth, a fifth and a sixth lens elements. The first lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, wherein the object-side surface has at least one convex critical point in an off-axis region thereof. The third lens element has an image-side surface being convex in a paraxial region thereof. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, and an image-side surface being convex in a paraxial region thereof. The sixth lens element has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface has at least one convex critical point in an off-axis region thereof.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 11, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Po-Lun HSU, Wei-Yu CHEN, Kuan-Ting YEH, Ssu-Hsin LIU
  • Patent number: 11953372
    Abstract: An optical sensing device is disclosed. The optical sensing device includes a sensing pixel, a driving circuit and a first light shielding layer. The sensing pixel includes a sensing circuit and a sensing element electrically connected to the sensing circuit. The driving circuit is electrically connected to the sensing circuit. The first light shielding layer includes at least one first opening corresponding to the sensing element, and the first light shielding layer is overlapped with the driving circuit in a top-view direction of the optical sensing device.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: April 9, 2024
    Assignee: InnoLux Corporation
    Inventors: Yu-Tsung Liu, Wei-Ju Liao, Wei-Lin Wan, Cheng-Hsueh Hsieh, Po-Hsin Lin, Te-Yu Lee
  • Patent number: 11948702
    Abstract: A radiation source apparatus includes a vessel, a laser source, a collector, a horizontal obscuration bar, and a reflective mirror. The vessel has an exit aperture. The laser source is configured to emit a laser beam to excite a target material to form a plasma. The collector is disposed in the vessel and configured to collect a radiation emitted by the plasma and to reflect the collected radiation to the exit aperture of the vessel. The horizontal obscuration bar extends from a sidewall of the vessel at least to a position between the laser source and the exit aperture of the vessel. The reflective mirror is in the vessel and connected to the horizontal obscuration bar.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chung Tu, Sheng-Kang Yu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
  • Publication number: 20240105601
    Abstract: An integrated circuit includes a plurality of first layer deep lines, a plurality of first layer shallow lines, a plurality of second layer deep lines, and a plurality of second layer shallow lines. The integrated circuit also includes a first active device and a second active device coupled between a conducting path that has a low resistivity portion and a low capacitivity portion. The first active device has an output coupled to a first layer deep line that is in the low resistivity portion. The second active device has an input coupled to a first layer shallow line that is in the low capacitivity portion. The low resistivity portion excludes the first layer shallow lines and the second layer shallow lines, and the low capacitivity portion excludes the first layer deep lines and the second layer deep lines.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Wei-An LAI, Te-Hsin CHIU, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG, Chia-Tien WU
  • Patent number: 11942469
    Abstract: An integrated circuit includes a first-type active-region structure, a second-type active-region structure on a substrate, and a plurality of gate-conductors. The integrated circuit also includes a backside horizontal conducting line in a backside first conducting layer below the substrate, a backside vertical conducting line in a backside second conducting layer below the backside first conducting layer, and a pin-connector for a circuit cell. The pin-connector is directly connected between the backside horizontal conducting line and the backside vertical conducting line. The backside horizontal conducting line extends across a vertical boundary of the circuit cell.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-An Lai, Shih-Wei Peng, Te-Hsin Chiu, Jiann-Tyng Tzeng, Chung-Hsing Wang
  • Patent number: 11943921
    Abstract: Various embodiments of the present application are directed to an IC, and associated forming methods. In some embodiments, the IC comprises a memory region and a logic region integrated in a substrate. A plurality of memory cell structures is disposed on the memory region. Each memory cell structure of the plurality of memory cell structures comprises a control gate electrode disposed over the substrate, a select gate electrode disposed on one side of the control gate electrode, and a spacer between the control gate electrode and the select gate electrode. A contact etch stop layer (CESL) is disposed along an upper surface of the substrate, extending upwardly along and in direct contact with a sidewall surface of the select gate electrode within the memory region. A lower inter-layer dielectric layer is disposed on the CESL between the plurality of memory cell structures within the memory region.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Han Lin, Te-Hsin Chiu, Wei Cheng Wu
  • Patent number: 11937901
    Abstract: An arteriovenous fistula (AVF) stenosis detection system and method thereof and sensing device are provided. The AVF stenosis detection system includes: a sensing device including a microphone; and a server coupled to the sensing device. The sensing device contacts a first location of a patient body, wherein there is a first distance between the first location and a second location of an AVF of the patient body, and the first location is located on an extended path of an artery or a vein corresponding to the AVF. The sensing device receives a frequency spectrum signal through the microphone and transmits the frequency spectrum signal to the server. The server calculates a stenosis percentage of the AVF corresponding to the frequency spectrum signal through a machine learning module and transmits the stenosis percentage to the sensing device.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: March 26, 2024
    Assignee: Above Care Inc.
    Inventors: Wei-Ta Chen, Yung-Hsin Chen
  • Publication number: 20240096865
    Abstract: A semiconductor device, includes a first metal layer, a second metal layer, a drain/source contact and at least one conductive via. The first metal layer has a first conductor that extends in a first direction and a second conductor that extends in the first direction, wherein the second conductor is directly adjacent to the first conductor. The second metal layer has a third conductor that extends in a second direction, wherein the second direction is transverse to the first direction. The drain/source contact extends in the second direction and is connected to the second conductor. The at least one conductive via connects the first conductor and the second conductor through the third conductor.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: Wei-Hsin TSAI, Hui-Zhong ZHUANG, Chih-Liang CHEN, Li-Chun TIEN
  • Publication number: 20240096623
    Abstract: A method of manufacturing a semiconductor device includes forming a first layer comprising an organic material over a substrate. A second layer is formed over the first layer, wherein the second layer includes a silicon-containing material and one or more selected from the group consisting of a photoacid generator, an actinic radiation absorbing additive including an iodine substituent, and a silicon-containing monomer having iodine or phenol group substituents. A photosensitive layer is formed over the second layer, and the photosensitive layer is patterned.
    Type: Application
    Filed: March 17, 2023
    Publication date: March 21, 2024
    Inventors: Chieh-Hsin HSIEH, Wei-Han LAI, Ching-Yu CHANG
  • Patent number: D1019349
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: March 26, 2024
    Assignee: QBIC TECHNOLOGY CO., LTD.
    Inventors: Yi-Hsin Chen, Wei-Yuan Cheng, Ren-Yin Wu Ji