Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.

Abstract: A feedback circuit with feedback impedance modulation according to the present invention comprises a compare circuit, a counter and a switching resistor circuit. The compare circuit receives a feedback signal of a power converter to compare the feedback signal with a threshold signal for generating a control signal. The feedback signal is correlated to a load condition of the power converter. The counter is coupled to the compare circuit and generates a modulation signal in response to the control signal. The switching resistor circuit is coupled to the counter and a feedback loop of the power converter for modulating a feedback impedance of the power converter in response to the modulation signal. The feedback impedance is directly modulated from a lower resistance to a higher resistance when the load condition is reduced from a half/full-load to a no/light-load.

Abstract: A switching controller having switching frequency hopping for a power converter includes an oscillator generating a pulse signal for determining a switching frequency of a switching signal, a maximum duty-cycle circuit generating a maximum duty-cycle signal in response to the switching signal for determining the switching frequency of the switching signal, a pattern generator generating a digital pattern code in response to a clock signal, a programmable capacitor coupled to the pattern generator and the oscillator for modulating the switching frequency of the switching signal in response to the digital pattern code, and a PWM circuit coupled to the oscillator and the maximum duty-cycle circuit for generating the switching signal in accordance with the pulse signal and the maximum duty-cycle signal. A maximum on-time of the switching signal is limited by the maximum duty-cycle signal. The switching signal is utilized to switch a transformer of the power converter.

Abstract: A switching controller having switching frequency hopping for a power converter includes a first oscillator generating a pulse signal and a maximum duty-cycle signal for determining a switching frequency of a switching signal, a pattern generator having a second oscillator and generating a digital pattern code in response to a clock signal, a programmable capacitor coupled to the pattern generator and the first oscillator for modulating the switching frequency of the switching signal in response to the digital pattern code, and a PWM circuit coupled to the first oscillator for generating the switching signal in accordance with the maximum duty-cycle signal. A maximum on-time of the switching signal is limited by the maximum duty-cycle signal. The switching signal is utilized to switch a transformer of the power converter.

Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.

Abstract: A control circuit of a power converter for light-load power saving according to the present invention comprises a first feedback circuit coupled to an output voltage of the power converter to receive a first feedback signal. A second feedback circuit is coupled to the output voltage to receive a second feedback signal. A control circuit generates a switching signal for switching a transformer of the power converter and regulating the output voltage of the power converter in response to the first feedback signal and the second feedback signal. The switching signal is generated in accordance with the first feedback signal when an output load is high. The switching signal is generated in accordance with the second feedback signal during a light-load condition.

Abstract: A control circuit includes a detection circuit to detect the short-circuited of a current sense terminal of the power converter. It includes a comparator, a verification circuit and a timer circuit. The comparator receives an input signal for generating a sense signal. The input signal represents the switching current of a power switch. The sense signal is enabled when the input signal is lower than a threshold. The verification circuit generates a protection signal in response to the sense signal or/and -a delay signal. The protection signal is generated when the current sense terminal is short-circuited, in which the power switch and the sense signal are enabled after the time delay of the delay signal. The protection signal turns off the power switch for the protection.

Abstract: A PWM controller compensates a maximum output power of a power converter having a power switch. The PWM controller includes an oscillator for generating a saw signal and a pulse signal, a power limiter coupled to the oscillator for generating a saw-limited signal in response to the saw signal, and a PWM unit coupled to the power limiter and the oscillator to generate a PWM signal for controlling the power switch in response to the saw-limited signal and the pulse signal. The saw-limited signal has a level being flattened during a period of time before an output voltage is generated, and is then transformed to a saw-limited waveform after the period of time.

Abstract: A switching controller having switching frequency hopping for a power converter includes a first oscillator generating a pulse signal and a maximum duty-cycle signal for determining a switching frequency of a switching signal, a pattern generator having a second oscillator and generating a digital pattern code in response to a clock signal, a programmable capacitor coupled to the pattern generator and the first oscillator for modulating the switching frequency of the switching signal in response to the digital pattern code, and a PWM circuit coupled to the first oscillator for generating the switching signal in accordance with the maximum duty-cycle signal. A maximum on-time of the switching signal is limited by the maximum duty-cycle signal. The switching signal is utilized to switch a transformer of the power converter.

Abstract: The present invention provides a power saving circuit for PWM circuit. The power saving circuit is utilized to control at least one internal circuit. The power saving circuit comprises a switching circuit which generates a switching signal. The power saving circuit controls the internal circuit in response to the switching. The power saving circuit disables the internal circuit for power saving when the switching signal is disabled.

Abstract: A biased current-limit circuit for limiting a maximum output power of a power converter includes an oscillator for generating a pulse signal. A waveform generator generates a waveform signal in response to a switching signal and a second-sampling signal. A sample-hold circuit is used to sample the waveform signal to generate a hold signal in response to a first-sampling signal. The sample-hold circuit further samples the hold signal to generate a current-limit threshold in response to the second-sampling signal. A current comparator is utilized to compare a current-sensing signal with the current-limit threshold to limit a maximum on-time of the switching signal.

Abstract: A switching circuit for power converters is presented. It includes a voltage-clipping device, a resistive device, a first transistor and a second transistor. The voltage-clipping device is coupled to an input voltage. The first transistor is connected in series with the voltage-clipping device for switching the input voltage. The second transistor is coupled to control the first transistor and the voltage-clipping device in response to a control signal. The resistive device provides a bias voltage to turn on the voltage-clipping device and the first transistor when the second transistor is turned off. Once the second transistor is turned on, the first transistor is turned off and the voltage-clipping device is negatively biased. The voltage-clipping device is developed to clamp a maximum voltage for the first transistor.

Abstract: The present invention provides a high efficiency voltage regulator. It includes an input transistor coupled to a voltage source to provide a supply voltage. A detection circuit is coupled to the voltage source and the supply voltage to generate a control signal and an enable signal in response to voltage levels of the voltage source and the supply voltage. A charge pump circuit is coupled to the detection circuit and the input transistor to turn on the input transistor in response to the control signal. A control transistor is connected to the detection circuit and the input transistor to turn off the input transistor in response to the control signal.

Abstract: The present invention provides a driving circuit. It includes a plurality of current mirrors to generate a first charge current and a second charge current in response to a reference current. A switch circuit generates a driving signal in response to an input signal. A driving switch is coupled between the first charge current and the switch circuit. Once the driving switch is turned on and the level of the input signal is in high level, the switch circuit generates the driving signal, the level of the driving signal-being in high level, in response to the first charge current and the second charge current. A detection circuit generates a control signal to turn on/off the driving switch. The detection circuit turns off the driving switch to disable the first charge current after a period of delay time when the level of the driving signal is in high level.

Abstract: A PWM controller compensates a maximum output power of a power converter having a power switch. The PWM controller includes an oscillator for generating a saw signal and a pulse signal, a power limiter coupled to the oscillator for generating a saw-limited signal in response to the saw signal, and a PWM unit coupled to the power limiter and the oscillator to generate a PWM signal for controlling the power switch in response to the saw-limited signal and the pulse signal. The saw-limited signal has a level being flattened during a period of time before an output voltage is generated, and is then transformed to a saw-limited waveform after the period of time.

Abstract: A control circuit includes a detection circuit to detect the short-circuited of a current sense terminal of the power converter. It includes a comparator, a verification circuit and a timer circuit. The comparator receives an input signal for generating a sense signal. The input signal represents the switching current of a power switch. The sense signal is enabled when the input signal is lower than a threshold. The verification circuit generates a protection signal in response to the sense signal or/and -a delay signal. The protection signal is generated when the current sense terminal is short-circuited, in which the power switch and the sense signal are enabled after the time delay of the delay signal. The protection signal turns off the power switch for the protection.

Abstract: The present invention provides a driving circuit. It includes a plurality of current mirrors to generate a first charge current and a second charge current in response to a reference current. A switch circuit generates a driving signal in response to an input signal. A driving switch is coupled between the first charge current and the switch circuit. Once the driving switch is turned on and the level of the input signal is in high level, the switch circuit generates the driving signal, the level of the driving signal-being in high level, in response to the first charge current and the second charge current. A detection circuit generates a control signal to turn on/off the driving switch. The detection circuit turns off the driving switch to disable the first charge current after a period of delay time when the level of the driving signal is in high level.

Abstract: The present invention provides a high efficiency voltage regulator. It includes an input transistor coupled to a voltage source to provide a supply voltage. A detection circuit is coupled to the voltage source and the supply voltage to generate a control signal and an enable signal in response to voltage levels of the voltage source and the supply voltage. A charge pump circuit is coupled to the detection circuit and the input transistor to turn on the input transistor in response to the control signal. A control transistor is connected to the detection circuit and the input transistor to turn off the input transistor in response to the control signal.

Abstract: The invention presents a switching power control circuit including two levels of under voltage lockout to improve the protection of the power supply. An input terminal of control circuit is connected to a supplied capacitor to supply the power of the control circuit. The supplied capacitor is charged through a start resistor for the start-up. Once the input voltage reaches a start-up voltage, the control circuit will start the operation. After that, the power is further supplied from a transformer of the power supply. If a fault condition is occurred, the switching of the control circuit will be stop and the supplied capacitor will be discharged. When the input voltage is discharged lower than a first under-voltage lockout threshold, the circuits of control circuit are shut down to consume lower power. Furthermore, once the input voltage is discharged lower than a second under-voltage lockout threshold, the control circuit will enable the start-up again.

Abstract: A switching circuit for power converters is presented. It includes a voltage-clipping device, a resistive device, a first transistor and a second transistor. The voltage-clipping device is coupled to an input voltage. The first transistor is connected in series with the voltage-clipping device for switching the input voltage. The second transistor is coupled to control the first transistor and the voltage-clipping device in response to a control signal. The resistive device provides a bias voltage to turn on the voltage-clipping device and the first transistor when the second transistor is turned off. Once the second transistor is turned on, the first transistor is turned off and the voltage-clipping device is negatively biased. The voltage-clipping device is developed to clamp a maximum voltage for the first transistor.