Patents by Inventor Wei Hu ZHANG

Wei Hu ZHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11947416
    Abstract: A system and related method identify a weakness of a workflow in a complex system. The method collects runtime data about the complex system. The complex system comprises a plurality of subcomponents, and the method identifies an abnormal operation in the complex system. The method constructs a multi-dimensional cause-and-effect relation matrix among the plurality of subcomponents, and filters one or more related operations using the multi-dimensional cause-and-effect relation matrix.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: April 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Wei Xian, Gang Lyu, Dong Ping Song, Geng Hu, Yao Dong Zhang, Ke Qiang Chen
  • Patent number: 11817355
    Abstract: A semiconductor device includes a substrate; a gate structure, located over the substrate, the gate structure including a first gate oxide layer, a second gate oxide layer, and a silicon layer. The first gate oxide layer is over the substrate, and the first gate oxide layer has a sloped sidewall on one side and a vertical sidewall on another side. The second gate oxide layer is over the substrate and on the sloped sidewall of the first gate oxide layer, and a thickness of the second gate oxide layer is less than a thickness of the first gate oxide layer. The silicon layer is formed over the first gate oxide layer and the second gate oxide layer.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: November 14, 2023
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Hu Wang, Shan Shan Wang, Feng Qiu, Wei Hu Zhang
  • Publication number: 20220028746
    Abstract: A semiconductor device includes a substrate; a gate structure, located over the substrate, the gate structure including a first gate oxide layer, a second gate oxide layer, and a silicon layer. The first gate oxide layer is over the substrate, and the first gate oxide layer has a sloped sidewall on one side and a vertical sidewall on another side. The second gate oxide layer is over the substrate and on the sloped sidewall of the first gate oxide layer, and a thickness of the second gate oxide layer is less than a thickness of the first gate oxide layer. The silicon layer is formed over the first gate oxide layer and the second gate oxide layer.
    Type: Application
    Filed: October 11, 2021
    Publication date: January 27, 2022
    Inventors: Hu WANG, Shan Shan WANG, Feng QIU, Wei Hu ZHANG
  • Patent number: 11201088
    Abstract: A method for forming a semiconductor device includes providing a substrate, forming an oxide layer over the substrate, forming a plurality of first gate oxide layers by etching the oxide layer, forming a second gate oxide layer between adjacent first gate oxide layers, forming a silicon layer over the plurality of first gate oxide layers and the second gate oxide layer, and etching the plurality of first gate oxide layers, the silicon layer, and the second gate oxide layer to expose the substrate, thereby forming a plurality of gate structures. The first gate oxide layer of the plurality of first gate oxide layers has sloped sidewalls. A thickness of the second gate oxide layer is less than a thickness of the first gate oxide layer. Each gate structure includes an etched first oxide layer, a portion of the second gate oxide layer, and a portion of the silicon layer.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: December 14, 2021
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Hu Wang, Shan Shan Wang, Feng Qiu, Wei Hu Zhang
  • Publication number: 20210020519
    Abstract: A method for forming a semiconductor device includes providing a substrate, forming an oxide layer over the substrate, forming a plurality of first gate oxide layers by etching the oxide layer, forming a second gate oxide layer between adjacent first gate oxide layers, forming a silicon layer over the plurality of first gate oxide layers and the second gate oxide layer, and etching the plurality of first gate oxide layers, the silicon layer, and the second gate oxide layer to expose the substrate, thereby forming a plurality of gate structures. The first gate oxide layer of the plurality of first gate oxide layers has sloped sidewalls. A thickness of the second gate oxide layer is less than a thickness of the first gate oxide layer. Each gate structure includes an etched first oxide layer, a portion of the second gate oxide layer, and a portion of the silicon layer.
    Type: Application
    Filed: July 16, 2020
    Publication date: January 21, 2021
    Inventors: Hu WANG, Shan Shan WANG, Feng QIU, Wei Hu ZHANG