Abstract: A microelectromechanical system microphone includes a semiconductor-on-insulator structure, a plurality of resistors, a plurality of first openings, and a vent hole. The semiconductor-on-insulator structure includes a substrate, an insulating layer and a semiconductor layer. The resistors are formed in the semiconductor layer, the first openings are formed in the semiconductor layer, and the vent hole is formed in the insulating layer and the substrate. The resistors are connected to each other to form a resistor pattern, and the first openings are all formed within the resistor pattern.

Abstract: A semiconductor structure having micro-electro-mechanical system (MEMS) devices is provided. One of the MEMS devices includes a substrate having a first region and a second region; a membrane structure formed in the first region and positioned correspondingly to a cavity of the substrate; a logic device formed in the second region, and electrically connected to the membrane structure; an interconnection structure formed in the second region, and the interconnection structure formed on the substrate and covering the logic device; and an etching stop layer formed in the second region, and the etching stop layer formed on the interconnection structure and including a nitride layer and a carbon-containing layer formed on the nitride layer. Also, a variation in resonant frequencies of the MEMS devices on the entire wafer is less than 10%.

Abstract: A microelectromechanical system microphone includes a semiconductor-on-insulator structure, a plurality of resistors, a plurality of first openings, and a vent hole. The semiconductor-on-insulator structure includes a substrate, an insulating layer and a semiconductor layer. The resistors are formed in the semiconductor layer, the first openings are formed in the semiconductor layer, and the vent hole is formed in the insulating layer and the substrate. The resistors are connected to each other to form a resistor pattern, and the first openings are all formed within the resistor pattern.

Abstract: A method of forming a semiconductor device is disclosed. Provided is a substrate having at least one MOS device, at least one metal interconnection and at least one MOS device formed on a first surface thereof. A first anisotropic etching process is performed to remove a portion of the substrate from a second surface of the substrate and thereby form a plurality of vias in the substrate, wherein the second surface is opposite to the first surface. A second anisotropic etching process is performed to remove another portion of the substrate from the second surface of the substrate and thereby form a cavity in the substrate, wherein the remaining vias are located below the cavity. An isotropic etching process is performed to the cavity and the remaining vias.

Abstract: A method of forming a semiconductor device is disclosed. Provided is a substrate having at least one MOS device, at least one metal interconnection and at least one MOS device formed on a first surface thereof. A first anisotropic etching process is performed to remove a portion of the substrate from a second surface of the substrate and thereby form a plurality of vias in the substrate, wherein the second surface is opposite to the first surface. A second anisotropic etching process is performed to remove another portion of the substrate from the second surface of the substrate and thereby form a cavity in the substrate, wherein the remaining vias are located below the cavity. An isotropic etching process is performed to the cavity and the remaining vias.

Abstract: A method for fabricating a semiconductor device, wherein the method comprises steps as follows: Firstly, a device wafer is provided and a patterned bonding layer is then formed within a scribe line region of the device wafer. Subsequently a handle wafer is bonded to the device wafer by the patterned bonding layer. Next, a dicing process is performed along the scribe line region in order to divide the device wafer into a plurality of dices and remove the patterned bonding layer simultaneously, whereby the divided dices can be separated from the handle wafer.

Abstract: A method for fabricating a semiconductor device, wherein the method comprises steps as follows: Firstly, a device wafer is provided and a patterned bonding layer is then formed within a scribe line region of the device wafer. Subsequently a handle wafer is bonded to the device wafer by the patterned bonding layer. Next, a dicing process is performed along the scribe line region in order to divide the device wafer into a plurality of dices and remove the patterned bonding layer simultaneously, whereby the divided dices can be separated from the handle wafer.