Patents by Inventor Wei Huang

Wei Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955298
    Abstract: A button module is provided. The button module comprises a base, a pressing part, and an elastic part. The pressing part includes a fixed end and a free end. The fixed end is pivotally connected to the base in a first axial direction. The elastic part is disposed on a side of the pressing part facing the base. The elastic part includes a first damping portion and a second damping portion selectively pressing against the base, where a hardness of the first damping portion is different from a hardness of the second damping portion.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: April 9, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Te-Wei Huang, Zih-Siang Huang, Jhih-Wei Rao, Hung-Chieh Wu, Liang-Jen Lin
  • Patent number: 11956938
    Abstract: A device incudes a substrate. A first fin and a second fin are over the substrate. An isolation structure is laterally between the first fin and the second fin. A gate structure crosses the first fin and the second fin. A first source/drain epitaxy structure is over the first fin. A second source/drain epitaxy structure is over the second fin. A spacer layer extends from a first sidewall of the first fin to a first sidewall of the second fin along a top surface of the isolation structure.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tetsu Ohtou, Ching-Wei Tsai, Kuan-Lun Cheng, Yasutoshi Okuno, Jiun-Jia Huang
  • Patent number: 11957018
    Abstract: A display device includes: a substrate having display and non-display areas; a first conductive layer including first and second sub-conductive lines; a second conductive layer including third and fourth sub-conductive lines, wherein, in the display area, the first sub-conductive line and the third sub-conductive lines cross from a top view; and a third conductive layer including third conductive lines and corresponding to the non-display area; wherein, corresponding to the non-display area, a portion of a projection of the one of the third conductive lines is overlapped with a portion of a projection of the second sub-conductive line on the substrate, and another portion of the projection of the one of the third conductive lines is overlapped with a portion of a projection of the fourth sub-conductive line on the substrate.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: April 9, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Hui-Min Huang, Li-Wei Sung, Cheng-Tso Chen, Chia-Min Yeh
  • Patent number: 11956082
    Abstract: Aspects presented herein may enhance a HARQ feedback operation to improve data retransmissions by using tri-state HARQ feedback, and may enable a UE to construct a codebook for tri-state HARQ feedback. In one aspect, a UE determines whether tri-state HARQ feedback or bi-state HARQ feedback is configured based on a DL carrier. The UE generates HARQ feedback for at least one of a received PDCCH or a received PDSCH on the DL carrier based on the determination whether the DL carrier is configured with the tri-state HARQ feedback. The UE transmits the generated HARQ feedback.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: April 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Yang, Yi Huang, Wanshi Chen, Peter Gaal, Hwan Joon Kwon, Krishna Kiran Mukkavilli, Tingfang Ji
  • Patent number: 11956421
    Abstract: Method and apparatus of video coding are disclosed. According to one method, in the decoder side, a predefined Intra mode is assigned to a neighboring block adjacent to the current luma block when the neighboring block satisfies one or more conditions. An MPM (Most Probable Mode) list is derived based on information comprising at least one of neighboring Intra modes. A current Intra mode is derived utilizing the MPM list. The current luma block is decoded according to the current Intra mode According to another method, a predefined Intra mode is assigned to a neighboring block adjacent to the current luma block if the neighboring block is coded in BDPCM (Block-based Delta Pulse Code Modulation) mode, where the predefined Intra mode is set to horizontal mode or vertical mode depending on prediction direction used by the BDPCM mode.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: April 9, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Man-Shu Chiang, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Shih-Ta Hsiang
  • Patent number: 11955694
    Abstract: An antenna component is provided. An orthographic projection of auxiliary antennas on a clearance area is entirely located in, partly located in, or close to a radiation-sensitive area where a specific absorption ratio (SAR) value of a frequency band needs to be reduced, so that a signal emitted from the radiation-sensitive area where the SAR value of the frequency band needs to be reduced on a primary antenna may be absorbed by the auxiliary antennas, and the auxiliary antennas generate secondary radiation.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: April 9, 2024
    Assignee: HuiZhou TCL Mobile Communication Co., Ltd.
    Inventors: Yi Huang, Lei Chen, Wei Chen, Yibing Chen
  • Patent number: 11955154
    Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
  • Patent number: 11956738
    Abstract: A UE performs a cell activation process in a wireless network. The UE calculates a first automatic gain control (AGC) setting based on downlink signals from a base station. The downlink signals include a coarse beam reference signal, a fine beam reference signal, and a conversion indication that indicates a power conversion between the coarse beam reference signal and the fine beam reference signal. The UE further calculates a second AGC setting based on the first AGC setting and the conversion indication. The UE performs a cell search using one of the first AGC setting and the second AGC setting, and performs fine time-frequency tracking using the other of the first AGC setting and the second AGC setting.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: April 9, 2024
    Assignee: MEDIATEK INC.
    Inventors: Din-Hwa Huang, Tsang-Wei Yu
  • Patent number: 11954152
    Abstract: The present specification discloses video matching. In a computer-implemented method, a plurality of feature vectors of a target video is obtained. A candidate video similar to the target video is retrieved from a video database based on the plurality of feature vectors of the target video. A time domain similarity matrix feature map is constructed between the target video and the candidate video based on the target video and the candidate video. Using the time domain similarity matrix feature map as an input into a deep learning detection model, a video segment matching the target video in the candidate video and a corresponding similarity is output.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 9, 2024
    Assignee: Alipay (Hangzhou) Information Technology Co., Ltd.
    Inventors: Chen Jiang, Wei Zhang, Qing Wang, Yuan Cheng, Furong Xu, Kaiming Huang, Xiaobo Zhang, Feng Qian, Xudong Yang, Tan Pan
  • Patent number: 11955397
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 9, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
  • Patent number: 11955547
    Abstract: An integrated circuit device includes a gate stack disposed over a substrate. A first L-shaped spacer is disposed along a first sidewall of the gate stack and a second L-shaped spacer is disposed along a second sidewall of the gate stack. The first L-shaped spacer and the second L-shaped spacer include silicon and carbon. A first source/drain epitaxy region and a second source/drain epitaxy region are disposed over the substrate. The gate stack is disposed between the first source/drain epitaxy region and the second source/drain epitaxy region. An interlevel dielectric (ILD) layer disposed over the substrate. The ILD layer is disposed between the first source/drain epitaxy region and a portion of the first L-shaped spacer disposed along the first sidewall of the gate stack and between the second source/drain epitaxy region and a portion of the second L-shaped spacer disposed along the second sidewall of the gate stack.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Jen Pan, Yu-Hsien Lin, Hsiang-Ku Shen, Wei-Han Fan, Yun Jing Lin, Yimin Huang, Tzu-Chung Wang
  • Publication number: 20240110997
    Abstract: Disclosed are a device and method for detecting defects of a high-voltage cable cross-bonded grounding system. The method comprises: selecting a protective grounding box of a cross-bonded grounding system, respectively connecting a signal excitation coupler to A-phase, B-phase and C-phase coaxial cables of the protective grounding box, selecting a stable signal with a frequency different from a power frequency or a field interference frequency, and testing effective current values and phases responded by the A-phase, B-phase and C-phase coaxial cables when the stable signal with the frequency F1 is injected into the A-phase, B-phase and C-phase coaxial cables of the protective grounding box in a coupled manner; and obtaining resistances and inductances of branch circuits of the cable cross-bonded grounding system by calculation according to measurement data, and determining if the cable cross-bonded grounding system has a connection defect.
    Type: Application
    Filed: August 4, 2022
    Publication date: April 4, 2024
    Applicants: STATE GRID JIANGSU ELECTRIC POWER CO., LTD. RESEARCH INSTITUTE, STATE GRID JIANGSU ELECTRIC POWER CO., LTD., JIANGSU ELECTRIC POWER RESEARCH INSTITUTE CO., LTD.
    Inventors: Jingying CAO, Qiang HUANG, Jinggang YANG, Jie CHEN, Rong SUN, Jianjun LIU, Xiao TAN, Libin HU, Chenying LI, Wei ZHANG
  • Publication number: 20240113563
    Abstract: A wireless power transfer apparatus for capacitive-inductive power transfer has a primary and a secondary device separated by the conductive member. The primary device has at least two transmitter plates configured to be capacitively coupled with the conductive member to induce a current flow and generate a magnetic field in the conductive member. The secondary device is connectable to a load and provided with a receiving coil configured to be inductively coupled with the conductive member.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 4, 2024
    Inventors: Aiguo HU, Liang HUANG, Wei ZHOU
  • Publication number: 20240113119
    Abstract: The present disclosure describes a method for the formation of gate-all-around nano-sheet FETs with tunable performance. The method includes disposing a first and a second vertical structure with different widths over a substrate, where the first and the second vertical structures have a top portion comprising a multilayer nano-sheet stack with alternating first and second nano-sheet layers. The method also includes disposing a sacrificial gate structure over the top portion of the first and second vertical structures; depositing an isolation layer over the first and second vertical structures so that the isolation layer surrounds a sidewall of the sacrificial gate structure; etching the sacrificial gate structure to expose each multilayer nano-sheet stack from the first and second vertical structures; removing the second nano-sheet layers from each exposed multilayer nano-sheet stack to form suspended first nano-sheet layers; forming a metal gate structure to surround the suspended first nano-sheet layers.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Tetsu Ohtou, Ching-Wei Tsai, Jiun-Jia Huang, Kuan-Lun Cheng, Chi-Hsing Hsu
  • Publication number: 20240113615
    Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.
    Type: Application
    Filed: February 22, 2023
    Publication date: April 4, 2024
    Inventors: Chun-Hao HUANG, Chun-Wei LIN, I-Hsiang SHIH, Ching-Nan WU, Jia-Wei YEH
  • Publication number: 20240108241
    Abstract: Drug delivery articles, resident articles, and retrieval systems e.g., for gram-level dosing, are generally provided. In some embodiments, the residence articles are configured for transesophageal administration, transesophageal retrieval, and/or gastric retention to/in a subject. In certain embodiments, the residence article includes dimensions configured for transesophageal administration with a gastric resident system. In some cases, the residence article may be configured to control drug release e.g., with zero-order drug kinetics with no potential for burst release for weeks to months. In some embodiments, the residence articles described herein comprise biocompatible materials and/or are safe for gastric retention. In certain embodiments, the residence article includes dimensions configured for transesophageal retrieval. In some cases, the residence articles described herein may comprise relatively large doses of drug (e.g., greater than or equal to 1 gram).
    Type: Application
    Filed: December 15, 2023
    Publication date: April 4, 2024
    Applicants: Massachusetts Institute of Technology, The Brigham and Women's Hospital, Inc., The General Hospital Corporation
    Inventors: Robert S. Langer, Carlo Giovanni Traverso, Malvika Verma, Feyisope Eweje, Christoph Winfried Johannes Steiger, Junwei Li, Nhi Phan, Hen-Wei Huang, Jacqueline Chu, John Ashraf Fou Salama
  • Publication number: 20240111078
    Abstract: A method forming a grating device includes: providing a substrate; entering the substrate into a process chamber; and depositing a grating material on the substrate to form a grating material layer on the substrate. A refractive index of the grating material gradually changes during depositing the grating material in the process chamber. The grating material layer includes a varying refractive index.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: Chun-Wei HUANG, Yu-Shan TSAI, Po-Han FU
  • Publication number: 20240113154
    Abstract: A semiconductor device may include a compound substrate and a 3-dimensional inductor structure. The compound substrate may include a front surface and a back surface. The 3-dimensional inductor structure may include a front conductive stack, a back conductive layer, and at least one through-hole structure. At least one portion of the front conductive stack may include a first conductive layer disposed on the front surface of the compound substrate, and a second conductive layer disposed on the first conductive layer. The second conductive layer has a thickness ranging between 30 micrometers and 400 micrometers. The back conductive layer is disposed on the back surface of the compound substrate. The at least one through-hole structure penetrates through the compound substrate, and electrically connects the front conductive stack to the back conductive layer.
    Type: Application
    Filed: November 20, 2022
    Publication date: April 4, 2024
    Applicant: RichWave Technology Corp.
    Inventors: Chia-Wei Chang, Yan-Han Huang, Chin-Chia Chang
  • Publication number: 20240112688
    Abstract: The present disclosure provides an audio compression device, an audio compressing system and an audio compression method. The audio compression device comprises a first transceiver and a first processor. The first transceiver is connected to the first processor. The processor obtains an audio signal and an available bandwidth, and the processor performs an audio compression encoding on the audio signal to obtain a sample audio signal, and then compares with the audio signal and the sample audio signal to generate a residual signal, and the residual signal is transmitted according to the available bandwidth. The audio signal can be completely transmitted to an audio decompression device to reduce the distortion of the audio signal.
    Type: Application
    Filed: October 4, 2022
    Publication date: April 4, 2024
    Applicant: SAVITECH CORP.
    Inventors: Sing-Ban Robert TIEN, Wen-Wei KANG, Wu-Lin CHANG, Chi-Feng HUANG, Lee-Chang PANG
  • Patent number: D1021389
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: April 9, 2024
    Assignee: Shenzhen Deyuanxiang Technology Development Co., Ltd.
    Inventor: Wei Huang