Patents by Inventor Wei-Hung Chuang

Wei-Hung Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240371715
    Abstract: A semiconductor package includes a substrate, a semiconductor die, a lid, and an adhesive layer. The semiconductor die is attached to the substrate. The lid is over the semiconductor die and the substrate. The adhesive layer is sandwiched between the lid and the semiconductor die. The adhesive layer includes a metallic thermal interface material (TIM) layer and a polymeric TIM layer adjacent to the metallic TIM layer. The polymeric TIM layer is located on corners of the semiconductor die from a top view.
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Min Wang, Chang-Jung Hsueh, Jui-Chang Chuang, Wei-Hung Lin, Kuo-Chin Chang
  • Patent number: 12094792
    Abstract: A semiconductor package includes a substrate, a semiconductor die, a lid, and an adhesive layer. The semiconductor die is attached to the substrate. The lid is over the semiconductor die and the substrate. The adhesive layer is sandwiched between the lid and the semiconductor die. The adhesive layer includes a metallic thermal interface material (TIM) layer and a polymeric TIM layer adjacent to the metallic TIM layer. The polymeric TIM layer is located on corners of the semiconductor die from a top view.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: September 17, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Min Wang, Chang-Jung Hsueh, Jui-Chang Chuang, Wei-Hung Lin, Kuo-Chin Chang
  • Publication number: 20230153259
    Abstract: A data transmission method, applied to a data transmission system comprising a reception interface and a plurality of transmission interfaces, comprising: (a) receiving first transmission information from a source device via the reception interface, wherein the first transmission information comprises information of data groups corresponding to at least two of the transmission interfaces; and (b) transmitting at least portion of the data groups by a corresponding one of the transmission interfaces in turn to a target device which corresponds to the data group comprising the portion, according to the first transmission information, until transmission of all of the data groups is completed.
    Type: Application
    Filed: March 10, 2022
    Publication date: May 18, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Chih-Yu Hsu, Wei-Hung Chuang
  • Patent number: 11334506
    Abstract: An interface connection method applied to a connection device. The connection device is configured to connect a host end having a first connection interface and a device end having a second connection interface. The interface connection method includes determining a voltage level of a detection pin; performing a first initialization when the detection pin is at a low level; providing an electrical power for detecting whether the electrical power is consumed or not when the detection pin is at a high level; sending a link signal when the electrical power is consumed; and performing a second initialization when the device end is detected to be in a ready state.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: May 17, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Wei-Hung Chuang, Li-Chiao Hung, Hung-Tai Chen
  • Patent number: 11281516
    Abstract: An error handling method for a transmission interface connecting between a first device and a second device for performing data transmission between the first device and the second device, wherein a connection type between the transmission interface and the first device is a direct interface (DI) and the connection type between the transmission interface and the second device is an indirect interface (II), and the error handling method comprises: when an error is detected at the direct interface, reporting an error event to a host of the first device; when an error is detected at the indirect interface, attempting to handle the error without letting the host discover it; and when the error detected at the indirect interface is determined as unable to be solved, reporting another error event to the host.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: March 22, 2022
    Assignee: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Ting Chien, Wei-Hung Chuang, Chih-Yu Hsu
  • Publication number: 20210374082
    Abstract: An interface connection method applied to a connection device. The connection device is configured to connect a host end having a first connection interface and a device end having a second connection interface. The interface connection method includes determining a voltage level of a detection pin; performing a first initialization when the detection pin is at a low level; providing an electrical power for detecting whether the electrical power is consumed or not when the detection pin is at a high level; sending a link signal when the electrical power is consumed; and performing a second initialization when the device end is detected to be in a ready state.
    Type: Application
    Filed: January 27, 2021
    Publication date: December 2, 2021
    Inventors: Cheng-Yuan HSIAO, Sung-Kao LIU, Wei-Hung CHUANG, Li-Chiao HUNG, Hung-Tai CHEN
  • Patent number: 11126233
    Abstract: A circuit includes: a first interface circuit supporting multiple first interface operating modes respectively corresponding to different versions of a first data transmission protocol; a second interface circuit supporting multiple second interface operating modes respectively corresponding to different versions of a second data transmission protocol; a control circuit configured to operably instruct the first interface circuit to operate in a first target operating mode selected from the multiple first interface operating modes, and configured to operably instruct the second interface circuit to operate in a second target operating mode selected from the multiple second interface operating modes; wherein a difference between a nominal data rate of the first target operating mode and a nominal data rate of the second target operating mode is less than a predetermined threshold.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: September 21, 2021
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yi Ting Chien, Cheng Yuan Hsiao, Chih Yu Hsu, Sung Kao Liu, Wei Hung Chuang
  • Publication number: 20210048859
    Abstract: A circuit includes: a first interface circuit supporting multiple first interface operating modes respectively corresponding to different versions of a first data transmission protocol; a second interface circuit supporting multiple second interface operating modes respectively corresponding to different versions of a second data transmission protocol; a control circuit configured to operably instruct the first interface circuit to operate in a first target operating mode selected from the multiple first interface operating modes, and configured to operably instruct the second interface circuit to operate in a second target operating mode selected from the multiple second interface operating modes; wherein a difference between a nominal data rate of the first target operating mode and a nominal data rate of the second target operating mode is less than a predetermined threshold.
    Type: Application
    Filed: July 15, 2020
    Publication date: February 18, 2021
    Inventors: Yi Ting CHIEN, Cheng Yuan HSIAO, Chih Yu HSU, Sung Kao LIU, Wei Hung CHUANG
  • Publication number: 20200379833
    Abstract: An error handling method for a transmission interface connecting between a first device and a second device for performing data transmission between the first device and the second device, wherein a connection type between the transmission interface and the first device is a direct interface (DI) and the connection type between the transmission interface and the second device is an indirect interface (II), and the error handling method comprises: when an error is detected at the direct interface, reporting an error event to a host of the first device; when an error is detected at the indirect interface, attempting to handle the error without letting the host discover it; and when the error detected at the indirect interface is determined as unable to be solved, reporting another error event to the host.
    Type: Application
    Filed: December 12, 2019
    Publication date: December 3, 2020
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Ting Chien, Wei-Hung Chuang, Chih-Yu Hsu
  • Patent number: 10684668
    Abstract: A USB interface system capable of automatically adjusting connection speed and power consumption capability and a method thereof are provided. The method includes configuring a slave device to perform a first handshake procedure with a main device, and communicate with the main device by using a first connection specification; detecting a first power-off event by using a slave power detection module; when the first power-off event occurs, recording first power-off information by the memory unit. If the slave device is re-connected to the main device, the slave power detection module is configured to perform a second handshake process with the main device, and determine to re-communicate with the main device in a second connection specification different from the first connection specification according to the first power-off information.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: June 16, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yi-Ting Chien, Sung-Kao Liu, Cheng-Yuan Hsiao, Wei-Hung Chuang, Chih-Yu Hsu
  • Publication number: 20200081861
    Abstract: A high speed interface connection method used in a high speed interface connection apparatus configured to electrically couple a host terminal having a first connection interface and a device terminal having a second connection interface is provided that includes the steps outlined below. A maximum supported supply power is requested from the host terminal. A dissipated power required by the device terminal in operation is estimated. A host terminal transmission format of the host terminal and a device terminal transmission format of the device terminal in actual operation are respectively determined according to the maximum supported supply power and the dissipated power such that a device dissipated power of the device terminal under actual operation is not larger than a host supply power of the host terminal under actual operation. Communication is performed according to the host terminal transmission format and the device terminal transmission format.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 12, 2020
    Inventors: Chih-Yu HSU, Sung-Kao LIU, Cheng-Yuan HSIAO, Yi-Ting CHIEN, Wei-Hung CHUANG
  • Publication number: 20200064900
    Abstract: A USB interface system capable of automatically adjusting connection speed and power consumption capability and a method thereof are provided. The method includes configuring a slave device to perform a first handshake procedure with a main device, and communicate with the main device by using a first connection specification; detecting a first power-off event by using a slave power detection module; when the first power-off event occurs, recording first power-off information by the memory unit. If the slave device is re-connected to the main device, the slave power detection module is configured to perform a second handshake process with the main device, and determine to re-communicate with the main device in a second connection specification different from the first connection specification according to the first power-off information.
    Type: Application
    Filed: July 1, 2019
    Publication date: February 27, 2020
    Inventors: YI-TING CHIEN, SUNG-KAO LIU, CHENG-YUAN HSIAO, WEI-HUNG CHUANG, CHIH-YU HSU
  • Patent number: 10551905
    Abstract: A data-transmission-format conversion circuit has a first data transmission interface, a second data transmission interface, and a control circuit. The control circuit is coupled to the first data transmission interface and the second data transmission interface for processing data-format conversions between the first data transmission interface and the second data transmission interface. The control circuit is further used to control the second data transmission interface to switch from a first corresponding power mode to a second corresponding power mode when the first data transmission interface is switched from a first power mode to a second power mode. The control circuit is further used to control the second data transmission interface to switch from the first corresponding power mode to a third corresponding power mode when the first data transmission interface is switched from the first power mode to a third power mode.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 4, 2020
    Assignee: Realtek Semiconductor Corp.
    Inventors: Cheng-Yuan Hsiao, Sung-Kao Liu, Yi-Ting Chien, Wei-Hung Chuang, Chih-Yu Hsu