Patents by Inventor Wei-Hung Huang

Wei-Hung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250101151
    Abstract: A hydrocarbon resin polymer including a repeating unit (A) is derived from dicyclopentadiene (DCPD). The hydrocarbon resin polymer has a fluorine substituent, and the content of the fluorine substituent is 100 to 4500 ppm based on the total weight of the hydrocarbon resin polymer. A manufacturing method of the above hydrocarbon resin polymer. The manufacturing method includes polymerizing a mixture in the presence of a fluorine-containing compound, wherein the fluorine-containing compound is a boron trifluoride complex and the mixture includes a dicyclopentadiene. A substrate structure includes a resin layer, and a conductive layer disposed on the resin layer. The resin layer is formed from a resin composition including the above hydrocarbon resin polymer using a cross-linking process.
    Type: Application
    Filed: September 25, 2024
    Publication date: March 27, 2025
    Inventors: Chien-Han CHEN, Wei-Liang LEE, Ming-Hung LIAO, Yu-Tien CHEN, Yu-Chen HSU, Ka Chun AU-YEUNG, Chiung-Yao HUANG, Tzu-Yin HUANG, Yi-Hsuan TANG
  • Patent number: 12261364
    Abstract: An antenna module, a metamaterial structure and an electronic device are provided. The electronic device includes a housing, a glass material layer and an antenna module. The antenna module includes a substrate, at least one radiating element and a metamaterial structure. The metamaterial structure includes a metamaterial substrate, a plurality of first metal conductors, and a plurality of second metal conductors. The first metal conductors are disposed on the first surface of the metamaterial substrate and are spaced apart at intervals from each other, and the second metal conductors are disposed on the second surface of the metamaterial substrate and are spaced apart at intervals from each other. The first metal conductors respectively correspond to the second metal conductors. Shapes of the first metal conductors are different from shapes of the second metal conductors.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: March 25, 2025
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Wei-Jin Chen, Tsun-Che Huang, Jia-Hung Su
  • Publication number: 20250087533
    Abstract: A method of forming a semiconductor device includes: forming a via in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; forming an opening in the second dielectric layer, where the opening exposes an upper surface of the via; selectively forming a capping layer over the upper surface of the via, where the capping layer has a curved upper surface that extends above a first upper surface of the first dielectric layer distal from the substrate; after forming the capping layer, forming a barrier layer in the opening over the capping layer and along sidewalls of the second dielectric layer exposed by the opening; and filling the opening by forming an electrically conductive material over the barrier layer.
    Type: Application
    Filed: March 28, 2024
    Publication date: March 13, 2025
    Inventors: Ming-Hsing Tsai, Ya-Lien Lee, Chih-Han Tseng, Kuei-Wen Huang, Kuan-Hung Ho, Ming-Uei Hung, Chih-Cheng Kuo, Yi-An Lai, Wei-Ting Chen
  • Publication number: 20250070043
    Abstract: A method for depositing an electrically conductive layer on a surface of a three-dimensional (3D) electronic assembly comprising at least one electronic device embedded in a solid polymer material. The method comprises the steps of (i) providing a 3D electronic assembly, (ii) forming at least one flow barrier in the surface of the solid polymer material of the 3D electronic assembly, and (iii) depositing an electrically conductive layer on at least a portion of the surface of the solid polymer material, such that the electrically conductive layer is at least partially delimited by the flow barrier. The present invention also relates to an associated 3D electronic assembly.
    Type: Application
    Filed: August 20, 2024
    Publication date: February 27, 2025
    Inventors: Ming Hung CHANG, Alan Paul STADNIK, Wei-Po HUANG, Markus REINSTÄDT, Christoph STERNKIKER, Hui Hsien WU
  • Publication number: 20250067976
    Abstract: A head-mounted eye tracking system including a light-transmitting substrate, an eye tracker, and a signal processor is provided. The eye tracker is configured to sense eyeballs of a wearer. The eye tracker includes a plurality of light-emitting devices and a plurality of sensing devices. The plurality of light-emitting devices are configured to emit a tracking beam. The plurality of sensing devices are configured to receive the tracking beam reflected by the eyeballs of the wearer. The signal processor is electrically connected to the eye tracker. The plurality of sensing devices are embedded in grooves within the light-transmitting substrate.
    Type: Application
    Filed: November 8, 2024
    Publication date: February 27, 2025
    Applicant: Industrial Technology Research Institute
    Inventors: Han-Kuei Fu, Meng-Han Lin, Hsu-Shih Huang, Ming-Hsien Wu, Chia-Hsin Chao, Wei-Hung Kuo
  • Patent number: 12237320
    Abstract: Provided are a package structure and a method of forming the same. The method includes providing a first package having a plurality of first dies and a plurality of second dies therein; performing a first sawing process to cut the first package into a plurality of second packages, wherein one of the plurality of second packages comprises three first dies and one second die; and performing a second sawing process to remove the second die of the one of the plurality of second packages, so that a cut second package is formed into a polygonal structure with the number of nodes greater than or equal to 5.
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: February 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hung Lin, Hui-Min Huang, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng, Mirng-Ji Lii
  • Publication number: 20250062194
    Abstract: A semiconductor device includes a first conductive layer, a second conductive layer, a third conductive layer, a first organic layer, a first inorganic layer and a first silicon-containing layer. The third conductive layer is disposed between and electrically isolated from the first conductive layer and the second conductive layer. The first organic layer continuously covers the first conductive layer and the third conductive layer. The first inorganic layer is disposed over the first organic layer. The first silicon-containing layer is inserted between the first organic layer and the first inorganic layer, wherein the second conductive layer is disposed on and disposed in the first organic layer, the first silicon-containing layer and the first inorganic layer, to electrically connect to the first conductive layer.
    Type: Application
    Filed: November 4, 2024
    Publication date: February 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Lung Yang, Chih-Hung Su, Chen-Shien Chen, Hon-Lin Huang, Kun-Ming Tsai, Wei-Je Lin
  • Publication number: 20250043136
    Abstract: A novel rheology modifier which comprises a quaternary ammonium containing polyamide for use in aqueous paint, and that can provide excellent pigment suspension and rheological properties to the aqueous based coating without being affected by pH fluctuation.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 6, 2025
    Applicant: ELEMENTIS SPECIALTIES, INC.
    Inventors: Chun-Hung Yen, Wei-Jen Huang, Ming-Jhe Li, Yu-Lun Hung, Hou-Jen Yen, Yu-Yen Lu, Yu-Zhe Su, Hung-Yi Lin
  • Publication number: 20250017199
    Abstract: A biomimetic waterfowl includes a housing, two waterfowl legs, and a driving module. The waterfowl legs are spaced apart from each other in a left-right direction and are mounted to a bottom portion of the housing. Each waterfowl leg includes a first segment mounted to the housing and rotatable about a first axis parallel to the left-right direction, and a second segment rotatable about a second axis parallel to the first axis. The driving module is mounted to the housing and is configured to drive the waterfowl legs. Each of the waterfowl legs is movable between a retracted state, where the first segment extends forwardly from the housing and the second segment extends rearwardly from the first segment, and a propelling state, where the first segment extends rearwardly from the housing and the second segment extends rearwardly from the first segment.
    Type: Application
    Filed: December 5, 2023
    Publication date: January 16, 2025
    Inventors: Wei-Yu HUANG, Chang-Qi ZHANG, Guan-Hao PAN, Li-Yuan YEH, Tai-Yu CHEN, Ching-Hung LIU, Chih-Wei SHEN, Ching-Shu LAI
  • Patent number: 8612850
    Abstract: An information browsing method includes: partitioning contents of a page into a plurality of first data partitions by analyzing the contents of the page; assigning a plurality of first identifiers to the first data partitions, respectively; driving a display screen according to at least the first data partitions; and when receiving a partition selection input, determining a selected first data partition according to a first identifier corresponding to the partition selection input, wherein the selected first data partition is assigned with the first identifier.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: December 17, 2013
    Assignee: Mediatek Inc.
    Inventors: Wei-Hung Huang, Ching-Chieh Wang
  • Publication number: 20120185758
    Abstract: An information browsing method includes: partitioning contents of a page into a plurality of first data partitions by analyzing the contents of the page; assigning a plurality of first identifiers to the first data partitions, respectively; driving a display screen according to at least the first data partitions; and when receiving a partition selection input, determining a selected first data partition according to a first identifier corresponding to the partition selection input, wherein the selected first data partition is assigned with the first identifier.
    Type: Application
    Filed: January 13, 2011
    Publication date: July 19, 2012
    Inventors: Wei-Hung Huang, Ching-Chieh Wang
  • Patent number: 8145971
    Abstract: A data processing system for processing digital data with a low density parity check (LDPC) matrix includes: a storage device for storing a plurality of indices representing a plurality of shifting numbers, where the LDPC matrix comprises an array of elements, and at least one element of the LDPC matrix represents a cyclic permutation matrix that is produced by cyclically shifting columns of an identity matrix to the right according to one of the shifting numbers; and a processing circuit, coupled to the storage device, for retrieving at least one index to recover at least one element of the LDPC matrix according to the index and performing data processing according to the LDPC matrix.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: March 27, 2012
    Assignee: Mediatek Inc.
    Inventor: Wei-Hung Huang
  • Patent number: 8099644
    Abstract: A method for encoding digital data with a low-density parity check (LDPC) matrix includes: indirectly storing a non-regular portion of the LDPC matrix by storing a plurality of indices corresponding to a plurality of non-zero sub-matrices of the non-regular portion, and by storing a plurality of distance/location parameters respectively corresponding to numbers of zero sub-matrices between adjacent non-zero sub-matrices of the non-regular portion or respectively corresponding to distances between adjacent non-zero sub-matrices of the non-regular portion; generating at least one address according to at least one distance/location parameter; accessing information bits corresponding to the address; and recovering at least one element of the LDPC matrix according to at least one index and the information bits to encode the digital data according to the LDPC matrix.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: January 17, 2012
    Assignee: Mediatek Inc.
    Inventor: Wei-Hung Huang
  • Publication number: 20100326357
    Abstract: A nozzle and a furnace having the same are provided. The furnace has a high vacuum fitting used to assemble the nozzle to the furnace. The nozzle includes a first tube part and a second tube part connecting to the first tube part. In addition, an immobilization device is disposed on a surface of the first tube part. The immobilization device is corresponding to an o-ring of the high vacuum fitting and sheathed by the o-ring to steadily immobilize the nozzle to the furnace.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Inventors: Wei-Hung Huang, Po-Yueh Liu, Hsing-Hung Lin, Yi-Deng Huang, Chi-Fu Chen
  • Publication number: 20090313523
    Abstract: A method for encoding digital data with a low-density parity check (LDPC) matrix includes: indirectly storing a non-regular portion of the LDPC matrix by storing a plurality of indices corresponding to a plurality of non-zero sub-matrices of the non-regular portion, and by storing a plurality of distance/location parameters respectively corresponding to numbers of zero sub-matrices between adjacent non-zero sub-matrices of the non-regular portion or respectively corresponding to distances between adjacent non-zero sub-matrices of the non-regular portion; generating at least one address according to at least one distance/location parameter; accessing information bits corresponding to the address; and recovering at least one element of the LDPC matrix according to at least one index and the information bits to encode the digital data according to the LDPC matrix.
    Type: Application
    Filed: June 13, 2008
    Publication date: December 17, 2009
    Inventor: Wei-Hung Huang
  • Publication number: 20080195823
    Abstract: The invention relates to the processor for performing convolution interleaving/de-interleaving on data symbols on plural original data symbols and convolution de-interleaving on the convolution interleaved data symbols. The processor for performing convolution interleaving on data symbol comprises a memory, an original address generator, and a storage address generator which generates an original address. The storage address generator generates the storage address of each of the stored plural data symbols in the memory according to the original address and a first predetermined sequence, and each of the convolution interleaved data symbols is stored in the memory according to the storage address; furthermore, all stored data symbols in the memory are configured into a circular structure.
    Type: Application
    Filed: April 21, 2008
    Publication date: August 14, 2008
    Inventors: Wei-Hung Huang, Hsi-Chia Chang, Ching-Chieh Wang
  • Publication number: 20080126917
    Abstract: A data processing system for processing digital data with a low density parity check (LDPC) matrix includes: a storage device for storing a plurality of indices representing a plurality of shifting numbers, where the LDPC matrix comprises an array of elements, and at least one element of the LDPC matrix represents a cyclic permutation matrix that is produced by cyclically shifting columns of an identity matrix to the right according to one of the shifting numbers; and a processing circuit, coupled to the storage device, for retrieving at least one index to recover at least one element of the LDPC matrix according to the index and performing data processing according to the LDPC matrix.
    Type: Application
    Filed: November 26, 2007
    Publication date: May 29, 2008
    Inventor: Wei-Hung Huang
  • Patent number: 7363552
    Abstract: The invention relates to the processor for performing convolution interleaving/de-interleaving on data symbols on plural original data symbols and convolution de-interleaving on the convolution interleaved data symbols. The processor for performing convolution interleaving on data symbol comprises a memory, an original address generator, and a storage address generator which generates an original address. The storage address generator generates the storage address of each of the stored plural data symbols in the memory according to the original address and a first predetermined sequence, and each of the convolution interleaved data symbols is stored in the memory according to the storage address; furthermore, all stored data symbols in the memory are configured into a circular structure.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: April 22, 2008
    Assignee: Mediatek Inc.
    Inventors: Wei-Hung Huang, Hsi-Chia Chang, Ching-Chieh Wang
  • Patent number: D1063926
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: February 25, 2025
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Wei-Ning Chai, Yu-Wen Cheng, Tzu-Yung Huang, Wang-Hung Yeh
  • Patent number: D1063927
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: February 25, 2025
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Wei-Ning Chai, Yu-Wen Cheng, Tzu-Yung Huang, Wang-Hung Yeh