Abstract: An antenna device includes a substrate, two T-shaped radiation portions, two feeding portions and an isolation structure. The substrate has an upper surface, a side surface and a lower surface. Two opposite ends of the side surface are connected to the upper surface and the lower surface, respectively. The two T-shaped radiation portions are located on the upper surface of the substrate. The two feeding portions are connected to the two T-shaped radiation portions, respectively, and the two feeding portions are located on the side surface of the substrate. The isolation structure is located on the upper surface of the substrate, and the isolation structure is disposed between the two T-shaped radiation portions.

Abstract: A first and second semiconductor device are bonded together using a bonding contact pad embedded within a bonding dielectric layer of the first semiconductor device and at least one bonding via embedded within a bonding dielectric layer of the second semiconductor device. The bonding contact pad extends a first dimension in a first direction perpendicular to the major surface of the first semiconductor device and a second dimension in a second direction parallel to the plane of the first semiconductor wafer, the second dimension being at least twice the first dimension. The bonding via extends a third dimension in the first direction and a fourth dimension in the second direction, the third dimension being at least twice the first dimension. The bonding contact pad and bonding via may be at least partially embedded in respective bonding dielectric layers in respective topmost dielectric layers of respective stacked interconnect layers.

Abstract: A method of forming a semiconductor structure is provided, and includes trimming a first substrate to form a recess on a sidewall of the first substrate. A conductive structure is formed in the first substrate. The method includes bonding the first substrate to a carrier. The method includes thinning down the first substrate. The method also includes forming a dielectric material in the recess and over a top surface of the thinned first substrate. The method further includes performing a planarization process to remove the dielectric material and expose the conductive structure over the top surface. In addition, the method includes removing the carrier from the first substrate.

Abstract: A method for forming a semiconductor package is provided. The method includes forming a first alignment mark in a first substrate of a first wafer and forming a first bonding structure over the first substrate. The method also includes forming a second bonding structure over a second substrate of a second wafer and trimming the second substrate, so that a first width of the first substrate is greater than a second width of the second substrate. The method further includes attaching the second wafer to the first wafer via the first bonding structure and the second bonding structure, thinning the second wafer until a through-substrate via in the second substrate is exposed, and performing a photolithography process on the second wafer using the first alignment mark.

Abstract: The present disclosure provides an antenna system, which includes a defected ground structure board and an antenna structure board. The defected ground structure board includes a first insulating plate and a defected ground structure layer, and the defected ground structure layer is disposed on the first insulating plate. The antenna structure board is disposed on the defected ground structure board. The antenna structure board includes at least one antenna body and a second insulating plate, the at least one antenna body is disposed on the second insulating plate, and the second insulating plate is disposed on the defected ground structure layer.

Abstract: A method includes forming a first sealing layer at a first edge region of a first wafer; and bonding the first wafer to a second wafer to form a wafer stack. At a time after the bonding, the first sealing layer is between the first edge region of the first wafer and a second edge region of the second wafer, with the first edge region and the second edge region comprising bevels. An edge trimming process is then performed on the wafer stack. After the edge trimming process, the second edge region of the second wafer is at least partially removed, and a portion of the first sealing layer is left as a part of the wafer stack. An interconnect structure is formed as a part of the second wafer. The interconnect structure includes redistribution lines electrically connected to integrated circuit devices in the second wafer.

Abstract: A remote speaker microphone includes a housing having a bezel defining an outer surface. The remote speaker microphone further includes a toggle switch lever that rocks back and forth relative to the bezel. The remote speaker microphone further includes a bezel opening through which the toggle switch lever extends at the outer surface. The bezel and the toggle switch lever define a predetermined gap within the bezel opening and within which the toggle switch lever rocks. The bezel, the bezel opening, and the toggle switch lever together form an ice crushing region in response to rocking the toggle switch lever.

Abstract: A remote speaker microphone includes a housing having a bezel defining an outer surface. The remote speaker microphone further includes a toggle switch lever that rocks back and forth relative to the bezel. The remote speaker microphone further includes a bezel opening through which the toggle switch lever extends at the outer surface. The bezel and the toggle switch lever define a predetermined gap within the bezel opening and within which the toggle switch lever rocks. The bezel, the bezel opening, and the toggle switch lever together form an ice crushing region in response to rocking the toggle switch lever.