Patents by Inventor Wei Jue Lim

Wei Jue Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220341989
    Abstract: A test system for high voltage testing of semiconductor devices including at least one test socket and a docking plate assembly. Each test socket includes a socket enclosure for encompassing first and second contact finger assemblies, in which the socket enclosure may include a cover and alignment plate. At least one test socket is embedded within the docking plate assembly which is configured to mount between high voltage test head and a pick and place handler. The docking plate assembly and each test socket includes one or more site openings each for receiving a corresponding device under test (DUT) during a high voltage test procedure. Each contact finger assembly includes at least one contact finger configured as an elongated conductor with a bent tip for electrically interfacing a pad of the DUT.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 27, 2022
    Inventors: Wenshui Zhang, Wei Jue Lim
  • Patent number: 11460501
    Abstract: A test system for high voltage testing of semiconductor devices including at least one test socket and a docking plate assembly. Each test socket includes a socket enclosure for encompassing first and second contact finger assemblies, in which the socket enclosure may include a cover and alignment plate. At least one test socket is embedded within the docking plate assembly which is configured to mount between high voltage test head and a pick and place handler. The docking plate assembly and each test socket includes one or more site openings each for receiving a corresponding device under test (DUT) during a high voltage test procedure. Each contact finger assembly includes at least one contact finger configured as an elongated conductor with a bent tip for electrically interfacing a pad of the DUT.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: October 4, 2022
    Assignee: Silicon Laboratories Inc.
    Inventors: Wenshui Zhang, Wei Jue Lim
  • Patent number: 11226371
    Abstract: A test system for testing RF PCBs including an RF probe for interfacing an intermediate node of each RF PCB, an RF source providing an RF test signal, a reflectometer, and a test measurement system that makes a pass/fail determination of each RF PCB using a measured reflection coefficient. Each RF PCB includes an IC matching circuit and an antenna matching circuit coupled between an RFIC and an antenna, in which the intermediate RF node is between the matching circuits. The reflectometer outputs a measured reflection coefficient indicative of a comparison between a reflected RF signal and the RF test signal. The measured reflection coefficient may be corrected using error values based on a calibration procedure using a calibration kit with modified RF PCBs with known loads. The modified RF PCBs are measured with a network analyzer and the test system to calculate the error values used for production testing.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: January 18, 2022
    Assignee: Silicon Laboratories Inc.
    Inventors: Yuwono Kurnia Rahman, Pasi Rahikkala, Kian Jin Chua, Zhiyuan Guan, Wei Jue Lim
  • Publication number: 20210148973
    Abstract: A test system for testing RF PCBs including an RF probe for interfacing an intermediate node of each RF PCB, an RF source providing an RF test signal, a reflectometer, and a test measurement system that makes a pass/fail determination of each RF PCB using a measured reflection coefficient. Each RF PCB includes an IC matching circuit and an antenna matching circuit coupled between an RFIC and an antenna, in which the intermediate RF node is between the matching circuits. The reflectometer outputs a measured reflection coefficient indicative of a comparison between a reflected RF signal and the RF test signal. The measured reflection coefficient may be corrected using error values based on a calibration procedure using a calibration kit with modified RF PCBs with known loads. The modified RF PCBs are measured with a network analyzer and the test system to calculate the error values used for production testing.
    Type: Application
    Filed: November 15, 2019
    Publication date: May 20, 2021
    Inventors: Yuwono Kurnia Rahman, Pasi Rahikkala, Kian Jin Chua, Zhiyuan Guan, Wei Jue Lim