Patents by Inventor Wei-Jung Chung
Wei-Jung Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973117Abstract: Methods of forming contacts for source/drain regions and a contact plug for a gate stack of a finFET device are disclosed herein. Methods include etching a contact opening through a dielectric layer to expose surfaces of a first source/drain contact and repairing silicon oxide structures along sidewall surfaces of the contact opening and along planar surfaces of the dielectric layer to prevent selective loss defects from occurring during a subsequent selective deposition of conductive fill materials and during subsequent etching of other contact openings. The methods further include performing a selective bottom-up deposition of conductive fill material to form a second source/drain contact. According to some of the methods, once the second source/drain contact has been formed, the contact plug may be formed over the gate stack.Type: GrantFiled: August 3, 2021Date of Patent: April 30, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsien Huang, Chang-Ting Chung, Wei-Cheng Lin, Wei-Jung Lin, Chih-Wei Chang
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Patent number: 10559717Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween, wherein the first semiconductor layer includes a surrounding exposed region not covered by the active layer, and the surrounding exposed region surrounds the active layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surrounding exposed region of the first semiconductor layer; an electrode layer formed on the first conductive region in the surrounding exposed region; an outside insulating layer covering a portion of the conductive layer and the electrode layer, and including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the first opening; and a conductive substrate, wType: GrantFiled: November 13, 2018Date of Patent: February 11, 2020Assignee: EPISTAR CORPORATIONInventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, Yen-Liang Kuo, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, Yu-Yao Lin
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Patent number: 10297718Abstract: A light-emitting device includes a substrate including an upper surface; a light-emitting stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the light-emitting stack includes a first surface and a second surface opposite to the first surface toward to the upper surface; a plurality of depressions formed in the light-emitting stack and penetrating the second semiconductor layer, the active layer and a portion of the first semiconductor layer; an insulative layer covering the second surface of the light-emitting stack; a connector including a first portion and a second portion; and an electrode disposed at a side of the light-emitting stack and electrically connecting the connector, wherein the first portion of the connector is formed in the plurality of depressions, the second portion of the connector is between the insulative layer and the light-emitting stack.Type: GrantFiled: October 14, 2016Date of Patent: May 21, 2019Assignee: EPISTAR CORPORATIONInventors: Wei-Jung Chung, Jennhwa Fu, Cheng-Hsien Li, Chi-Hao Huang
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Publication number: 20190103515Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween, wherein the first semiconductor layer includes a surrounding exposed region not covered by the active layer, and the surrounding exposed region surrounds the active layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surrounding exposed region of the first semiconductor layer; an electrode layer formed on the first conductive region in the surrounding exposed region; an outside insulating layer covering a portion of the conductive layer and the electrode layer, and including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the first opening; and a conductive substrate, wType: ApplicationFiled: November 13, 2018Publication date: April 4, 2019Inventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, Yen-Liang Kuo, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, Yu-Yao Lin
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Patent number: 10153398Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a surrounding exposed region formed on peripheries of the semiconductor stack, exposing a surface of the first semiconductor layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surface of the first semiconductor layer in the surrounding exposed region; an electrode layer formed on the surrounding exposed region, surrounding the semiconductor stack, contacting the conductive layer and including an electrode pad not overlapping the semiconductor stack; an outside insulating layer covering a portion of the conductive layer and the electrode layer, including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the firsType: GrantFiled: November 1, 2017Date of Patent: December 11, 2018Assignee: EPISTAR CORPORATIONInventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, Yen-Liang Kuo, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, Yu-Yao Lin
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Publication number: 20180130924Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a surrounding exposed region formed on peripheries of the semiconductor stack, exposing a surface of the first semiconductor layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surface of the first semiconductor layer in the surrounding exposed region; an electrode layer formed on the surrounding exposed region, surrounding the semiconductor stack, contacting the conductive layer and including an electrode pad not overlapping the semiconductor stack; an outside insulating layer covering a portion of the conductive layer and the electrode layer, including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the firsType: ApplicationFiled: November 1, 2017Publication date: May 10, 2018Inventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, YEN-LIANG KUO, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, YU-YAO LIN
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Patent number: 9755104Abstract: A method of forming a rough surface includes: providing an article having a top surface, forming a plurality of agglomerated grains on the top surface by a deposition process, and patterning the top surface to form a rough surface by using the plurality of agglomerated grains as a mask.Type: GrantFiled: May 9, 2014Date of Patent: September 5, 2017Assignee: EPISTAR CORPORATIONInventors: Wei Jung Chung, Chi Hao Huang
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Publication number: 20170033265Abstract: A light-emitting device includes a substrate including an upper surface; a light-emitting stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the light-emitting stack includes a first surface and a second surface opposite to the first surface toward to the upper surface; a plurality of depressions formed in the light-emitting stack and penetrating the second semiconductor layer, the active layer and a portion of the first semiconductor layer; an insulative layer covering the second surface of the light-emitting stack; a connector including a first portion and a second portion; and an electrode disposed at a side of the light-emitting stack and electrically connecting the connector, wherein the first portion of the connector is formed in the plurality of depressions, the second portion of the connector is between the insulative layer and the light-emitting stack.Type: ApplicationFiled: October 14, 2016Publication date: February 2, 2017Inventors: Wei-Jung CHUNG, Jennhwa FU, Cheng-Hsien LI, Chi-Hao HUANG
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Publication number: 20150325744Abstract: A method of forming a rough surface includes: providing an article having a top surface, forming a plurality of agglomerated grains on the top surface by a deposition process, and patterning the top surface to form a rough surface by using the plurality of agglomerated grains as a mask.Type: ApplicationFiled: May 9, 2014Publication date: November 12, 2015Applicant: EPISTAR CORPORATIONInventors: Wei Jung CHUNG, Chi Hao HUANG
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Publication number: 20140374779Abstract: A light-emitting device includes a light-emitting stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes a first surface, a second surface opposite to the first surface, a first portion connecting to the first surface, and a second portion connecting to the first portion; an opening penetrating the first portion from the first surface and having a first width; a depression connecting to the opening and penetrating the second semiconductor layer, the active layer, and the second portion of the first semiconductor layer, wherein the depression includes a second width greater than the first width, and the depression includes a bottom to expose the second surface, and an electrode located in the depression and corresponding to the opening.Type: ApplicationFiled: June 11, 2014Publication date: December 25, 2014Inventors: Wei-Jung CHUNG, Jennhwa FU, Cheng-Hsien LI, Chi-Hao HUANG
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Patent number: 8378376Abstract: The present application describes a vertical light-emitting diode (VLED) and its manufacture method that use the combination of a reflective layer, a transparent conducting layer and transparent dielectric layer as structural layers for promoting uniform current distribution and increasing light extraction. In the VLED, a transparent conducting layer is formed on a first outer surface of a stack of multiple group III nitride semiconductor layers. A transparent dielectric layer is then formed on a side of the transparent conducting layer opposite the side of the multi-layer structure. A first electrode structure is then formed on the transparent dielectric layer in electrical contact with the transparent conducting layer via a plurality of contact windows patterned through the transparent dielectric layer. The transparent conducting layer and the transparent dielectric layer are used as structural layers for improving light extraction.Type: GrantFiled: July 30, 2010Date of Patent: February 19, 2013Assignee: Tekcore Co., Ltd.Inventors: Wei-Jung Chung, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh
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Patent number: 7981705Abstract: In a method of manufacturing a vertical type light-emitting diode, a multilayered structure of group III nitride semiconductor compounds is epitaxy deposited on an irregular surface of a substrate. The substrate is then removed to expose an irregular surface of the multilayered structure corresponding to the irregular surface of the substrate. A portion of the exposed irregular surface of the multilayered structure is then etched for forming an electrode contact surface on which an electrode layer is subsequently formed. With this method, no specific planarized region is required on the irregular surface of the substrate. As a result, planarization treatment of the substrate is not necessary. The same substrate with the irregular surface can be reused for fabricating vertical and horizontal light-emitting diodes.Type: GrantFiled: July 30, 2010Date of Patent: July 19, 2011Assignee: Tekcore Co., Ltd.Inventors: Wei-Jung Chung, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh
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Publication number: 20110163293Abstract: The present application describes a vertical light-emitting diode (VLED) and its manufacture method that use the combination of a reflective layer, a transparent conducting layer and transparent dielectric layer as structural layers for promoting uniform current distribution and increasing light extraction. In the VLED, a transparent conducting layer is formed on a first outer surface of a stack of multiple group III nitride semiconductor layers. A transparent dielectric layer is then formed on a side of the transparent conducting layer opposite the side of the multi-layer structure. A first electrode structure is then formed on the transparent dielectric layer in electrical contact with the transparent conducting layer via a plurality of contact windows patterned through the transparent dielectric layer. The transparent conducting layer and the transparent dielectric layer are used as structural layers for improving light extraction.Type: ApplicationFiled: July 30, 2010Publication date: July 7, 2011Applicant: Tekcore Co., Ltd.Inventors: Wei-Jung Chung, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh
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Publication number: 20110097831Abstract: In a method of manufacturing a vertical type light-emitting diode, a multilayered structure of group III nitride semiconductor compounds is epitaxy deposited on an irregular surface of a substrate. The substrate is then removed to expose an irregular surface of the multilayered structure corresponding to the irregular surface of the substrate. A portion of the exposed irregular surface of the multilayered structure is then etched for forming an electrode contact surface on which an electrode layer is subsequently formed. With this method, no specific planarized region is required on the irregular surface of the substrate. As a result, planarization treatment of the substrate is not necessary. The same substrate with the irregular surface can be reused for fabricating vertical and horizontal light-emitting diodes.Type: ApplicationFiled: July 30, 2010Publication date: April 28, 2011Applicant: Tekcore Co., Ltd.Inventors: Wei-Jung CHUNG, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh