Patents by Inventor Wei-Jyun Wang

Wei-Jyun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190319581
    Abstract: An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.
    Type: Application
    Filed: October 21, 2018
    Publication date: October 17, 2019
    Inventors: Pang-Ning Chen, Chen-Lun Lin, Ying-Chia Chen, Wei-Jyun Wang, Mike Chun Hung Wang
  • Publication number: 20190317189
    Abstract: A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop.
    Type: Application
    Filed: July 9, 2018
    Publication date: October 17, 2019
    Inventors: Mike Chun Hung Wang, Pang-Ning Chen, Chen-Lun Lin, Ying-Chia Chen, Wei-Jyun Wang
  • Publication number: 20190319596
    Abstract: A low voltage inverter-based amplifier includes a first inverter-based amplification module, a second inverter-based amplification module, an inverter-based feedforward module, and an inverter-based common mode detector. The first inverter-based amplification module receives an input signal. The second inverter-based amplification module receives the input signal through the inverter-based feedforward module, and receives a first output signal from the first inverter-based amplification module. The inverter-based common mode detector receives an amplified signal from the second inverter-based amplification module, and outputs a feedback signal to the second inverter-based amplification module. Since the first and the second inverter-based amplification modules are both inverter-based, the supply voltage of the low voltage inverter-based amplifier is provided to supply one PMOS and one NMOS for normal operation.
    Type: Application
    Filed: September 28, 2018
    Publication date: October 17, 2019
    Inventors: Pang-Ning CHEN, Chen-Lun LIN, Ying-Chia CHEN, Wei-Jyun WANG, Mike Chun-Hung WANG
  • Patent number: 10425086
    Abstract: A divider-less phase locked loop (PLL) includes a phase frequency detector (PFD), a charge pump (CP), a voltage controlled oscillator (VCO), a delay unit, and a clock gating unit. The PFD is electrically connected to the VCO through the CP, and the CP outputs a voltage control signal to the VCO. The VCO generates an output signal. The delay unit receives and delays a reference signal to generate a delay signal. The clock gating unit samples the output signal according to the delay signal. Since the clock gating unit samples the output signal according to the delay signal, the divider-less PLL does not need to include a divider to divide a frequency of the output signal. Therefore, power consumption of the divider-less PLL can be reduced.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: September 24, 2019
    Assignee: KaiKuTek Inc.
    Inventors: Pang-Ning Chen, Chen-Lun Lin, Ying-Chia Chen, Wei-Jyun Wang, Mike Chun-Hung Wang