Patents by Inventor Wei Kao

Wei Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12418530
    Abstract: During operation, the computer may obtain an access acceptance message, where the access acceptance message indicates that the electronic device has been authenticated and allowed to securely access a network, and where the authentication is based at least in part on a passphrase associated with a user of an electronic device. For example, the computer may receive the acceptance message from the computer network device or a second computer (such as a controller). Alternatively, the computer may obtain the access acceptance message while performing the authentication. Then, the computer may automatically provide a second passphrase addressed to a computer network device and the electronic device, where the second passphrase replaces the passphrase during a current session of the electronic device in the network. Moreover, when the current session ends, the computer may automatically revert to the passphrase for subsequent authentication of the user.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: September 16, 2025
    Assignee: Ruckus IP Holdings LLC
    Inventor: Wei Kao
  • Patent number: 12184180
    Abstract: A power supply phase doubling system includes a pulse width modulation (PWM) controller and first and second phase doubling chips. The PWM controller outputs a PWM signal. The first phase doubling chip is operated at a power supply voltage and has a first PWM output pin to generate a first control signal and a second control signal according to the PWM signal, and generates a first output signal according to the first control signal. The second phase doubling chip is operated at the power supply voltage, has a second PWM output pin, and is configured to generate a second output signal according to the second control signal. The first and second phase doubling chips are respectively switched between a master mode and a slave mode according to a voltage level of the first PWM output pin and a voltage level of the second PWM output pin.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: December 31, 2024
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Wei Kao, Ming-Ting Tsai, Hsiang-Jui Hung, Hsi-Ho Hsu, Chen-Hao Yu, Chun-San Lin, Wei-Gen Chung
  • Patent number: 12174222
    Abstract: A voltage detection device is provided. The voltage detection device includes a first voltage divider circuit, a comparison circuit, and a second voltage divider circuit. The first voltage divider circuit is configured to receive an input voltage and output a comparison voltage according to the input voltage. The comparison circuit is configured to receive the comparison voltage to compare the comparison voltage with a reference voltage and determine whether to change a trigger signal according to a comparison result. The second voltage divider circuit is configured to receive the input voltage. When the input voltage is greater than or equal to a predetermined voltage value, the second voltage divider circuit and the first voltage dividing circuit form a parallel structure to pull down the comparison voltage.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: December 24, 2024
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Wei-Gen Chung, Ming-Ting Tsai, Hsi-Ho Hsu, Chun-San Lin, Wei Kao, Chen-Hao Yu, Hsiang-Jui Hung
  • Publication number: 20240146732
    Abstract: During operation, the computer may obtain an access acceptance message, where the access acceptance message indicates that the electronic device has been authenticated and allowed to securely access a network, and where the authentication is based at least in part on a passphrase associated with a user of an electronic device. For example, the computer may receive the acceptance message from the computer network device or a second computer (such as a controller). Alternatively, the computer may obtain the access acceptance message while performing the authentication. Then, the computer may automatically provide a second passphrase addressed to a computer network device and the electronic device, where the second passphrase replaces the passphrase during a current session of the electronic device in the network. Moreover, when the current session ends, the computer may automatically revert to the passphrase for subsequent authentication of the user.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Applicant: ARRIS Enterprises LLC
    Inventor: Wei Kao
  • Publication number: 20240061018
    Abstract: A voltage detection device is provided. The voltage detection device includes a first voltage divider circuit, a comparison circuit, and a second voltage divider circuit. The first voltage divider circuit is configured to receive an input voltage and output a comparison voltage according to the input voltage. The comparison circuit is configured to receive the comparison voltage to compare the comparison voltage with a reference voltage and determine whether to change a trigger signal according to a comparison result. The second voltage divider circuit is configured to receive the input voltage. When the input voltage is greater than or equal to a predetermined voltage value, the second voltage divider circuit and the first voltage dividing circuit form a parallel structure to pull down the comparison voltage.
    Type: Application
    Filed: October 20, 2022
    Publication date: February 22, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Wei-Gen Chung, Ming-Ting Tsai, Hsi-Ho Hsu, Chun-San Lin, Wei Kao, Chen-Hao Yu, Hsiang-Jui Hung
  • Publication number: 20230336081
    Abstract: A power supply phase doubling system includes a pulse width modulation (PWM) controller and first and second phase doubling chips. The PWM controller outputs a PWM signal. The first phase doubling chip is operated at a power supply voltage and has a first PWM output pin to generate a first control signal and a second control signal according to the PWM signal, and generates a first output signal according to the first control signal. The second phase doubling chip is operated at the power supply voltage, has a second PWM output pin, and is configured to generate a second output signal according to the second control signal. The first and second phase doubling chips are respectively switched between a master mode and a slave mode according to a voltage level of the first PWM output pin and a voltage level of the second PWM output pin.
    Type: Application
    Filed: November 9, 2022
    Publication date: October 19, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Wei Kao, Ming-Ting Tsai, Hsiang-Jui Hung, Hsi-Ho Hsu, Chen-Hao Yu, Chun-San Lin, Wei-Gen Chung
  • Patent number: 9900050
    Abstract: A communication verification system is provided. The communication verification system includes a local transmitting-end unit, a remote receiving-end unit, and a repeater device. The local transmitting-end unit is set to a first computing mode and outputs an initial value. The remote receiving-end unit is set to a second computing mode. The repeater device receives the initial value from the local transmitting-end unit and outputs an initial value to the remote receiving-end unit according to the second computing mode. The repeater device receives and stores a computation result from the remote receiving-end unit, and then outputs a confirmation signal to the local transmitting-end unit according to the first computing mode. The repeater device outputs the computation result to the local transmitting-end unit for verification when the repeater device receives a query signal from the local transmitting-end unit.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: February 20, 2018
    Assignee: ATEN INTERNATIONAL CO., LTD.
    Inventors: Wei Kao, Hao-Tai Hsu
  • Publication number: 20160182123
    Abstract: A communication verification system is provided. The communication verification system includes a local transmitting-end unit, a remote receiving-end unit, and a repeater device. The local transmitting-end unit is set to a first computing mode and outputs an initial value. The remote receiving-end unit is set to a second computing mode. The repeater device receives the initial value from the local transmitting-end unit and outputs an initial value to the remote receiving-end unit according to the second computing mode. The repeater device receives and stores a computation result from the remote receiving-end unit, and then outputs a confirmation signal to the local transmitting-end unit according to the first computing mode. The repeater device outputs the computation result to the local transmitting-end unit for verification when the repeater device receives a query signal from the local transmitting-end unit.
    Type: Application
    Filed: August 21, 2015
    Publication date: June 23, 2016
    Applicant: ATEN INTERNATIONAL CO., LTD.
    Inventors: Wei Kao, Hao-Tai Hsu
  • Patent number: 7010295
    Abstract: A method and system for the testing of multiple elements in a communications network. The method may include using a test host that has both control and data input/output capabilities. The test host may send a signal over the network via one communication device, such as a mobile station, that is connected to and controlled by the test host. A resulting signal may then be received at the communication device or at a second communication device, which may be another mobile station, that is connected to and controlled by the test host. A comparison of the signal sent into the network with the signal received from the network may be used to verify proper operation of any elements in the network.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: March 7, 2006
    Assignee: Sprint Spectrum L.P.
    Inventors: Joshua Ryan Zerlan, Wei Kao