Abstract: In this invention a coating of unexposed photoresist is used to protect from semiconductor processing the area immediately above a zero layer alignment mark used for a wafer stepper alignment. The entire surface of a wafer is coated with photoresist and all shot sites on the surface of a wafer including those containing the zero layer alignment marks are exposed with circuit patterns. Before the exposed areas of photoresist are removed, a protective coating of unexposed photoresist is applied to the surface of the wafer immediately above the alignment marks but within the boundaries of the shot site. The wafer is processed in the areas outside of the protective coating of photoresist including the shot site containing alignment marks. The area under the protective coating is not processed. This maintains a clear and concise view of the alignment marks. The area beyond the protective coating is processed along with the other shot sites.

Abstract: There is first provided a substrate 10 and a target layer 12. There is then formed upon the target layer a patterned positive photoresist layer 14. There is then processed the target layer while employing the patterned positive photoresist layer as a mask layer, to thus form a processed target layer and a processed patterned positive photoresist layer. There is then photoexposed 18 the processed patterned positive photoresist layer to enhance its solubility. Finally, there is then stripped from the processed target layer the photoexposed processed patterned positive photoresist layer while employing a solvent.

Abstract: An apparatus and method for developing a selectively exposed resist pattern, on an integrated circuit wafer, which avoids damage to the resist pattern and allows greater freedom in the choice of resists. Developer is placed on a selectively exposed layer of resist for a first time. The layer of resist and developer are then immersed in a cleaning liquid time for a second time to stop the developing action and remove the developer. As an option, ultrasonic power can be delivered to the wafer or the cleaning liquid while the layer of resist is immersed in the cleaning liquid. The cleaning liquid is then removed from the layer of resist, now a resist pattern, and the wafer and resist pattern is placed in a vacuum for drying. As another option, heat can be applied to the wafer and resist pattern while they are in the vacuum. The wafer and resist pattern are then removed from the vacuum for further processing.

Abstract: An apparatus and method for developing a selectively exposed resist pattern, on an integrated circuit wafer, which avoids damage to the resist pattern and allows greater freedom in the choice of resists. Developer is placed on a selectively exposed layer of resist for a first time. The layer of resist and developer are then immersed in a cleaning liquid time for a second time to stop the developing action and remove the developer. As an option, ultrasonic power can be delivered to the wafer or the cleaning liquid while the layer of resist is immersed in the cleaning liquid. The cleaning liquid is then removed from the layer of resist, now a resist-pattern, and the wafer and resist pattern is placed in a vacuum for drying. As another option, heat can be applied to the wafer and resist pattern while they are in the vacuum. The wafer and resist pattern are then removed from the vacuum for further processing.

Abstract: An apparatus and method for developing a selectively exposed resist pattern, on an integrated circuit wafer, which avoids damage to the resist pattern and allows greater freedom in the choice of resists. Developer is placed on a selectively exposed layer of resist for a first time. The layer of resist and developer are then immersed in a cleaning liquid time for a second time to stop the developing action and remove the developer. As an option, ultrasonic power can be delivered to the wafer or the cleaning liquid while the layer of resist is immersed in the cleaning liquid. The cleaning liquid is then removed from the layer of resist, now a resist pattern, and the wafer and resist pattern is placed in a vacuum for drying. As another option, heat can be applied to the wafer and resist pattern while they are in the vacuum. The wafer and resist pattern are then removed from the vacuum for further processing.

Abstract: An apparatus and method for developing a selectively exposed resist pattern, on an integrated circuit wafer, which avoids damage to the resist pattern and allows greater freedom in the choice of resists. Developer is placed on a selectively exposed layer of resist for a first time. The layer of resist and developer are then immersed in a cleaning liquid time for a second time to stop the developing action and remove the developer. As an option, ultrasonic power can be delivered to the wafer or the cleaning liquid while the layer of resist is immersed in the cleaning liquid. The cleaning liquid is then removed from the layer of resist, now a resist pattern, and the wafer and resist pattern is placed in a vacuum for drying. As another option, heat can be applied to the wafer and resist pattern while they are in the vacuum. The wafer and resist pattern are then removed from the vacuum for further processing.

Abstract: An apparatus and method for developing a selectively exposed resist pattern, on an integrated circuit wafer, which avoids damage to the resist pattern and allows greater freedom in the choice of resists. Developer is placed on a selectively exposed layer of resist for a first time. The layer of resist and developer are then immersed in a cleaning liquid for a second time to stop the developing action and remove the developer. As an option, ultrasonic power can be delivered to the wafer or the cleaning liquid while the layer of resist is immersed in the cleaning liquid. The cleaning liquid is then removed from the layer of resist, now a resist pattern, and the wafer and resist pattern is placed in a vacuum for drying.

Abstract: In this invention a coating of unexposed photoresist is used to protect from semiconductor processing the area immediately above a zero layer alignment mark used for a wafer stepper alignment. The entire surface of a wafer is coated with photoresist and all shot sites on the surface of a wafer including those containing the zero layer alignment marks are exposed with circuit patterns. Before the exposed areas of photoresist are removed, a protective coating of unexposed photoresist is applied to the surface of the wafer immediately above the alignment marks but within the boundaries of the shot site. The wafer is processed in the areas outside of the protective coating of photoresist including the shot site containing alignment marks. The area under the protective coating is not processed. This maintains a clear and concise view of the alignment marks. The area beyond the protective coating is processed along with the other shot sites.

Abstract: In this invention a coating of unexposed photoresist is used to protect from semiconductor processing the area immediately above a zero layer alignment mark used for a wafer stepper alignment. The entire surface of a wafer is coated with photoresist and all shot sites on the surface of a wafer including those containing the zero layer alignment marks are exposed with circuit patterns. Before the exposed areas of photoresist are removed, a protective coating of unexposed photoresist is applied to the surface of the wafer immediately above the alignment marks but within the boundaries of the shot site. The wafer is processed in the areas outside of the protective coating of photoresist including the shot site containing alignment marks. The area under the protective coating is not processed. This maintains a clear and concise view of the alignment marks. The area beyond the protective coating is processed along with the other shot sites.

Abstract: A method and apparatus for curing a photoresist that is deposited in liquid form and spun on a surface of a wafer leaving a thin film to be cured. This invention teaches methods for curing the resist with improved thickness control using front side heating.

Abstract: A method and an apparatus are disclosed to improve the planarization of a coating upon a substrate, in particular to improve the planarization of a photoresist or spin-on-glass coating upon a semiconductor wafer. This is achieved by coupling an ultrasonic wave generator to either the chuck or the spindle of the chuck. Ultrasonic waves emanating from the ultrasonic generator are induced into the coating, vibrating it. The vibration causes coating material to fill in the valleys of the coating, thus planarizing the surface of the coating.

Abstract: A method and an apparatus are disclosed for enhancing the solution diffusibility of a developing liquid in a semiconductor wafer developing unit through the agitation of the liquid by acoustic power. Two embodiments are described using sonic and ultrasonic waves. In the first embodiment, a sonic wave couples into the developing liquid, agitating it and thereby enhancing its solution diffusibility. In the second embodiment, an ultrasonic wave couples into the semiconductor wafer, causing the photoresist pattern to vibrate, again enhancing the solution diffusibility of the developing liquid.

Abstract: A method and an apparatus are disclosed for enhancing the solution diffusibility of a developing liquid in a semiconductor wafer developing unit through the agitation of the liquid by acoustic power. Two embodiments are described using sonic and ultrasonic waves. In the first embodiment, a sonic wave couples into the developing liquid, agitating it and thereby enhancing its solution diffusibility. In the second embodiment, an ultrasonic wave couples into the semiconductor wafer, causing the photoresist pattern to vibrate, again enhancing the solution diffusibility of the developing liquid.

Abstract: A method is disclosed to improve the planarization of a coating upon a substrate, in particular to improve the planarization of a photoresist or spin-on-glass coating upon a semiconductor wafer. This is achieved by coupling an ultrasonic wave generator to either the chuck or the spindle of the chuck. Ultrasonic waves emanating from the ultrasonic generator are induced into the coating, vibrating it. The vibration causes coating material to fill in the valleys of the coating, thus planarizing the surface of the coating.

Abstract: A method and apparatus for curing a photoresist that is deposited in liquid form and spun on a surface of a wafer leaving a thin film to be cured. This invention teaches methods for curing the resist with improved thickness control using front side heating.

Abstract: A test apparatus and method for testing integrated circuit modules permitting visual observation of both top and bottom of the module under test. The test apparatus uses a first circuit board and a second circuit board interconnected by means of cables between cable sockets attached to each circuit board. The first circuit board has a display opening. An integrated circuit socket having a center opening is attached to the first circuit board so that the center opening of the integrated circuit socket is directly over the display opening of the first circuit board. Input connectors and jumper sockets attached to the second circuit board permit electrical signals to be connected to the integrated circuit socket contacts. Integrated circuit modules inserted into the integrated circuit socket can be visually observed directly or through the display opening in the first circuit board.