Abstract: Control logic in a memory device executes a read operation of at least a portion of first data stored in a first page buffer associated with a first memory plane of a plurality of memory planes of the memory device. A write operation is executed to cause second data associated with the at least the portion of the first data to be written to a second page buffer of the memory device.

Abstract: A memory device includes a memory array includes memory cells grouped into one or more address ranges. Control logic is coupled to the memory array and configured to detect one or more errors associated with one or more stored data items corresponding to a first address range of one or more address ranges. The control logic can determine that a number of the one or more stored data items exceeds a number of redundant memory locations for the first address space. Control logic can remap an association of a first memory address of at least one of the stored data items from a first address within the first address space to a second address in a second address range, where the second address range includes one or more available redundant memory locations.