Abstract: A method of forming dynamic random access memory (DRAM) comprising a deep trench capacitor with two electrodes and a node dielectric. The deep trench capacitor is formed by etching a deep trench, making a node dielectric on the surface of the trench, and filling the trench with poly-Si. The method also employs silicon on insulator (SOI) technology to form a single crystal Si layer on an insulator above the trench. The SOI is then contacted with the poly-Si electrode of the trench capacitor, and a transistor is fabricated above the trench capacitor. The method enables fabrication of a transistor above the trench capacitor and thereby frees space on the DRAM chip to allow for a greater density of devices on the DRAM chip.