Patents by Inventor Wei-Lun CHUNG
Wei-Lun CHUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250063813Abstract: A semiconductor device includes a first well region laterally separated from a second well region in a substrate, a shallow trench isolation (STI) structure laterally between the first well region and the second well region in the substrate, a first implant region of a dopant type opposite to a dopant type of the first well region in the substrate, disposed vertically lower than the STI structure and laterally between the first well region and a lateral center of the STI structure, and a second implant region of a dopant type opposite to a dopant type of the second well region in the substrate, disposed vertically lower than the STI structure and laterally between the second well region and the lateral center of the STI structure.Type: ApplicationFiled: November 7, 2023Publication date: February 20, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Hsuan Peng, Wei-Lun Chung, Anhao Cheng, Chien-Wei Lee, Yen-Liang Lin, Ru-Shang Hsiao
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Publication number: 20250056819Abstract: A capacitor structure and methods of forming the same are described. In some embodiments, the structure includes a first well region, a first semiconductor layer disposed over the first well region, a second semiconductor layer disposed on the first semiconductor layer, and a dielectric layer disposed on the second semiconductor layer. The dielectric layer has a top surface, a bottom surface, one or more protrusions extending towards the second semiconductor layer, and one or more openings in the top surface. The structure further includes a gate structure disposed on the dielectric layer.Type: ApplicationFiled: January 2, 2024Publication date: February 13, 2025Inventors: Wei-Lun Chung, Chung-Lei Chen, Anhao Cheng, Chien-Wei Lee, Yen-Liang Lin, Ru-Shang Hsiao
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Patent number: 12211790Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first vertical structure and a second vertical structure formed over the substrate, and a conductive rail structure between the first and second vertical structures. A top surface of the conductive rail structure can be substantially coplanar with top surfaces of the first and the second vertical structures.Type: GrantFiled: August 10, 2023Date of Patent: January 28, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yi-Bo Liao, Wei Ju Lee, Cheng-Ting Chung, Hou-Yu Chen, Chun-Fu Cheng, Kuan-Lun Cheng
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Patent number: 11637139Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.Type: GrantFiled: April 13, 2022Date of Patent: April 25, 2023Assignee: Vanguard International Semiconductor CorporationInventors: Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
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Patent number: 11538840Abstract: A semiconductor device includes a conductive substrate and an encapsulation structure. The conductive substrate has a plurality of pixels. The encapsulation structure is disposed on the conductive substrate and includes at least one light-collimating unit. The light-collimating unit includes a transparent substrate and a patterned light-shielding layer. The patterned light-shielding layer is disposed on the transparent substrate. The patterned light-shielding layer has a plurality of holes disposed to correspond to the pixels.Type: GrantFiled: August 15, 2019Date of Patent: December 27, 2022Assignee: Vanguard International Semiconductor CorporationInventors: Wu-Hsi Lu, Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Ming-Cheng Lo, Wei-Lun Chung
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Publication number: 20220238584Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.Type: ApplicationFiled: April 13, 2022Publication date: July 28, 2022Applicant: Vanguard International Semiconductor CorporationInventors: Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
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Patent number: 11335717Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.Type: GrantFiled: March 22, 2019Date of Patent: May 17, 2022Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
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Patent number: 11217708Abstract: An optical sensor includes a substrate, a first/second/third well disposed in a sensing region, a deep trench isolation structure, and a passivation layer. The substrate has a first conductivity type and includes the sensing region. The first well has a second conductivity type and a first depth. The second well has the second conductivity type and a second depth. The third well has the first conductivity type and a third depth. The deep trench isolation structure is disposed in the substrate and surrounding the sensing region, wherein the depth of the deep trench isolation structure is greater than the first depth, the first depth is greater than the second depth, and the second depth is greater than the third depth. The passivation layer is disposed over the substrate, wherein the passivation layer includes a plurality of protruding portions disposed directly above the sensing region.Type: GrantFiled: June 2, 2020Date of Patent: January 4, 2022Assignee: Vanguard International Semiconductor CorporationInventors: Shih-Hao Liu, Chung-Ren Lao, Chih-Cherng Liao, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
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Publication number: 20210376171Abstract: An optical sensor includes a substrate, a first/second/third well disposed in a sensing region, a deep trench isolation structure, and a passivation layer. The substrate has a first conductivity type and includes the sensing region. The first well has a second conductivity type and a first depth. The second well has the second conductivity type and a second depth. The third well has the first conductivity type and a third depth. The deep trench isolation structure is disposed in the substrate and surrounding the sensing region, wherein the depth of the deep trench isolation structure is greater than the first depth, the first depth is greater than the second depth, and the second depth is greater than the third depth. The passivation layer is disposed over the substrate, wherein the passivation layer includes a plurality of protruding portions disposed directly above the sensing region.Type: ApplicationFiled: June 2, 2020Publication date: December 2, 2021Applicant: Vanguard International Semiconductor CorporationInventors: Shih-Hao LIU, Chung-Ren LAO, Chih-Cherng LIAO, Wu-Hsi LU, Ming-Cheng LO, Wei-Lun CHUNG, Chih-Wei LIN
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Publication number: 20210050378Abstract: A semiconductor device includes a conductive substrate and an encapsulation structure. The conductive substrate has a plurality of pixels. The encapsulation structure is disposed on the conductive substrate and includes at least one light-collimating unit. The light-collimating unit includes a transparent substrate and a patterned light-shielding layer. The patterned light-shielding layer is disposed on the transparent substrate. The patterned light-shielding layer has a plurality of holes disposed to correspond to the pixels.Type: ApplicationFiled: August 15, 2019Publication date: February 18, 2021Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Wu-Hsi Lu, Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Ming-Cheng Lo, Wei-Lun Chung
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Publication number: 20200303441Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.Type: ApplicationFiled: March 22, 2019Publication date: September 24, 2020Applicant: Vanguard International Semiconductor CorporationInventors: Chung-Ren LAO, Chih-Cherng LIAO, Shih-Hao LIU, Wu-Hsi LU, Ming-Cheng LO, Wei-Lun CHUNG, Chih-Wei LIN