Abstract: In a method of manufacturing a semiconductor device, a first interlayer dielectric (ILD) layer is formed over a substrate, a chemical mechanical polishing (CMP) stop layer is formed over the first ILD layer, a trench is formed by patterning the CMP stop layer and the first ILD layer, a metal layer is formed over the CMP stop layer and in the trench, a sacrificial layer is formed over the metal layer, a CMP operation is performed on the sacrificial layer and the metal layer to remove a portion of the metal layer over the CMP stop layer, and a remaining portion of the sacrificial layer over the trench is removed.

Abstract: Methods for performing a pre-clean process to remove an oxide in semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a shallow trench isolation region over a semiconductor substrate; forming a gate stack over the shallow trench isolation region; etching the shallow trench isolation region adjacent the gate stack using an anisotropic etching process; and after etching the shallow trench isolation region with the anisotropic etching process, etching the shallow trench isolation region with an isotropic etching process, process gases for the isotropic etching process including hydrogen fluoride and ammonia.

Abstract: A display device is used to be accommodated in an exterior unit having at least a first color, and has a hidden display mode and a normal display mode. The display device includes a display panel and an optical structure layer. The optical structure layer is disposed on the display panel and includes an anti-glare layer and an anti-reflection layer disposed on the anti-glare layer. The gloss difference between the optical structure layer and the exterior unit is smaller than 10 GU. When in the hidden display mode, the display device displays at least a second color, and the color difference between the second color and the first color is smaller than 3, and when in the normal display mode, the display panel displays an image information.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin structure extended above a substrate along a first direction, and a first gate structure formed over the first fin structure along a second direction. The semiconductor device structure includes a first source/drain (S/D) structure formed over the first fin structure and adjacent to the first gate structure, and a cap layer formed on and in direct contact with the first S/D structure. The semiconductor device structure includes an isolation structure adjacent to the first gate structure and the first S/D structure along the first direction. The isolation structure extends from the first gate structure to the first S/D structure, and the first S/D structure has a protruding portion toward to the isolation structure, and the protruding portion of the first S/D structure is separated from the isolation structure by the cap layer.

Abstract: A method of fabricating a fin-like field effect transistor (FinFET) device includes providing a semiconductor substrate having a region for forming p-type metal-oxide-semiconductor (PMOS) devices and a region for forming n-type metal-oxide-semiconductor (PMOS) devices, forming fin structures in both regions of the substrate separated by isolation features, first forming source/drain (S/D) features in the PMOS region, and subsequently forming S/D features in the NMOS region. First forming the PMOS S/D features and then forming the NMOS S/D features results in a greater extent of loss of isolation features in the PMOS region than in the NMOS region.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin structure extended above a substrate along a first direction, and a first gate structure formed over the first fin structure along a second direction. The semiconductor device structure includes a first source/drain (S/D) structure formed over the first fin structure and adjacent to the first gate structure, and a cap layer formed on and in direct contact with the first S/D structure. The semiconductor device structure includes an isolation structure formed adjacent to the first gate structure and the first S/D structure along the first direction, and a bottom surface of the isolation structure is lower than a bottom surface of the first gate structure and a bottom surface of the first S/D structure.

Abstract: A method of fabricating a fin-like field effect transistor (FinFET) device includes providing a semiconductor substrate having a region for forming p-type metal-oxide-semiconductor (PMOS) devices and a region for forming n-type metal-oxide-semiconductor (PMOS) devices, forming fin structures in both regions of the substrate separated by isolation features, first forming source/drain (S/D) features in the PMOS region, and subsequently forming S/D features in the NMOS region. First forming the PMOS S/D features and then forming the NMOS S/D features results in a greater extent of loss of isolation features in the PMOS region than in the NMOS region.

Abstract: A head-mounted display device includes a display, two brackets, two buckles, and a headband module. The display has two buckling parts respectively located on opposite sides of the display. The brackets are respectively pivotally connected to opposite sides of the display. The buckles are respectively pivotally connected to the brackets. When the buckles are buckled onto the buckling parts, an unfolding angle of each bracket is limited to be greater than a locked angle. When the unfolding angle of each bracket is greater than an unlocked angle, the buckles are separated from the buckling parts. The unlocked angle is greater than the locked angle. When the buckles are separated from the buckling parts, the unfolding angle of each bracket is smaller than the locked angle. Opposite sides of the headband module are respectively detachably assembled to an end of each bracket away from the display.

Abstract: A semiconductor device according to the present disclosure includes a gate-all-around (GAA) transistor in a first device area and a fin-type field effect transistor (FinFET) in a second device area. The GAA transistor includes a plurality of vertically stacked channel members and a first gate structure over and around the plurality of vertically stacked channel members. The FinFET includes a fin-shaped channel member and a second gate structure over the fin-shaped channel member. The fin-shaped channel member includes semiconductor layers interleaved by sacrificial layers.

Abstract: A display device, including a display module, a photodetector, a processor, and an optical structure layer, is provided. The display module is used for displaying an image. The photodetector is electrically connected to the display module and is used for detecting brightness of an ambient light and outputting a sensing signal. The processor is electrically connected to the display module and the photodetector, and is used for receiving the sensing signal and outputting a command signal to the display module according to the sensing signal, so that the display module adjusts brightness of the image according to the command signal. The optical structure layer is disposed on the display module. A glossiness of the optical structure layer is between 4 GU and 35 GU, and a reflectivity of specular component included (SCI) of the optical structure layer is between 3% and 6%.

Abstract: A display device, including a first display panel, a second display panel, and a first optical structure layer, is provided. The first display panel has a first display surface emitting light toward a first direction. The second display panel has a second display surface emitting light toward a second direction, wherein the first direction is different from the second direction. The first optical structure layer is disposed on the first display panel, wherein a glossiness of the first optical structure layer is between 4 GU and 35 GU, and a reflectivity of specular component included (SCI) of the first optical structure layer is between 3% and 6%. The display device provided by the disclosure can reduce the influence of ambient light from the outside on a displayed image.

Abstract: A display device includes a display panel and an optical structure layer. The optical structure layer is disposed on the display panel. A glossiness of the optical structure layer is between 4 GU and 35 GU, and a reflectivity of specular component included (SCI) of the optical structure layer is between 3% and 6%. The display device disclosed in the disclosure may reduce an influence of a displayed image from ambient light from the outside.

Abstract: Particular embodiments described herein provide for an expandable heat sink for an electronic device. The expandable heat sink includes flexible thermal conductive material and an activator. The activator can cause the expandable heat sink to be in a retracted configuration with a retracted height or in an expanded configuration with an expanded height, wherein the expanded height is greater than the retracted height. In an example, the flexible thermal conductive material includes graphite sheets.

Abstract: An information handling system includes a lock, a switch, and a south bridge. The lock is configured to receive a key and to alternate between a locked position and an unlocked position. The switch is in communication with the lock. The switch is configured to receive a signal from the lock, to close if the lock is in the locked position, and to open if the lock is in the unlocked position. The south bridge is in communication with the switch. The south bridge is configured to disable a plurality of communication ports of the information handling system when the switch is closed, and configured to enable the communication ports when the switch is opened.

Abstract: An information handling system includes a lock, a switch, and a south bridge. The lock is configured to receive a key and to alternate between a locked position and an unlocked position. The switch is in communication with the lock. The switch is configured to receive a signal from the lock, to close if the lock is in the locked position, and to open if the lock is in the unlocked position. The south bridge is in communication with the switch. The south bridge is configured to disable a plurality of communication ports of the information handling system when the switch is closed, and configured to enable the communication ports when the switch is opened.

Abstract: An information handling system includes a lock, a switch, and a south bridge. The lock is configured to receive a key and to alternate between a locked position and an unlocked position. The switch is in communication with the lock. The switch is configured to receive a signal from the lock, to close if the lock is in the locked position, and to open if the lock is in the unlocked position. The south bridge is in communication with the switch. The south bridge is configured to disable a plurality of communication ports of the information handling system when the switch is closed, and configured to enable the communication ports when the switch is opened.

Abstract: An information handling system includes a lock, a switch, and a south bridge. The lock is configured to receive a key and to alternate between a locked position and an unlocked position. The switch is in communication with the lock. The switch is configured to receive a signal from the lock, to close if the lock is in the locked position, and to open if the lock is in the unlocked position. The south bridge is in communication with the switch. The south bridge is configured to disable a plurality of communication ports of the information handling system when the switch is closed, and configured to enable the communication ports when the switch is opened.