Abstract: The present invention relates to a structure and a method of data update in a cache memory inside a local processor, which uses the feature of cache control. A buffer block of a header buffer is mapped to a memory space at several different address sectors addressed by the local processor. Whenever the local processor attempts to access the internal cache memory, cache missing will occur so that a local processor will be forced to alternatively request new data from buffer blocks of a header buffer in a HCA. Consequently, the whole block is loaded into cache memory. This does not only boost cache update performance but also accelerates packet access.

Abstract: A message transmitting queue delivers messages between a source controller and a destination controller. According to the message transmitting request of the source controller, sequentially distribute the free message row of the message transmitting queue, and set the message row to the distributed state. After the source controller writes the message of the message row, set the message row to the written state. At this moment, when the message row is in the position that is read sequentially by the destination controller, a read request is issued, so that the destination controller reads the message according to the read request when the reading completes, clears the distributed signal and the written signal, so that the message row goes back to the free state. When the message transmitting queue has no free message row, a no free message row signal to inform the source controller is issued.

Abstract: A method for performing a MAC address lookup in a network switch of an Ethernet network is provided, using a memory structure including a number of multi-slot buckets. Each of the multi-slot buckets is mapped to a hash key derived from a MAC Address. Each of the multi-slot buckets has a number of forwarding table section, each storing a number of the forwarding table entries. If two forwarding table entries are stored in each forwarding table section of a 4-slot bucket ¼ memory space and ½ access time can be saved. Thus, the lookup for the forwarding table according to the MAC address in the Ethernet switch IC can be effectively performed.

Abstract: A symmetric dual-slot data hash method and a switching apparatus using the same having a first block and a second block of equal size for storing MAC addresses. The size of the dual-slot address table is p×2m with m is an integer, and p is 2 or a prime. The hash address comprises a higher address portion and a lower address portion. A CRC hash operation is performed to the MAC address by using the m-bit CRC function to obtain a hash value. Next, the highest bit of the hash value is removed and the remained bits are used as the lower address portion of the hash address. A dividend is set according to the m-th bit of the MAC address. After the dividend is divided by a divisor p to obtain a remainder, the remainder is set as a higher address portion of the hash address.