Patents by Inventor Weiping Xiong
Weiping Xiong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240170615Abstract: A flip-chip light-emitting device includes a transparent substrate, an epitaxial structure, a transparent dielectric layer, a plurality of first contact electrodes, multiple second contact electrodes, a metallic reflection layer, a first insulating layer, and an electrode pad region. The epitaxial structure is formed on the transparent substrate, and includes a first type semiconductor layer, an active layer, and a second type semiconductor layer. The first and second contact electrodes are embedded in the transparent dielectric layer, and respectively connected to the first and second type semiconductor layers. The second and first contact electrodes are arranged in an array. The second contact electrodes are disposed in a region perpendicularly below the first pad and are distributed along a circular ring that is concentric with one of the first contact electrodes. A light emitting module includes a circuit board, and the flip-chip light emitting device is mounted on the circuit board.Type: ApplicationFiled: November 1, 2023Publication date: May 23, 2024Inventors: Zhiwei WU, Yanyun WANG, Weiping XIONG, Di GAO, Huan-Shao KUO, Yu-Ren PENG
-
Publication number: 20240145441Abstract: The light-emitting device includes a substrate, a light-emitting chip unit formed on the substrate and including multiple chips, an isolation groove extending in a first direction and separating two adjacent ones of the chips, and a bridging structure. The isolation groove is defined by a bottom and two sidewalls and has a first groove section and a second groove section arranged in the first direction. The first groove section has a width in a width direction perpendicular to the first direction that is greater than a width of the second groove section in the width direction. At the first groove section, one of the sidewalls has a curved portion. The bridging structure is formed on the bottom and the sidewalls, covers the curved portion, and electrically connects the two adjacent ones of the chips.Type: ApplicationFiled: January 5, 2024Publication date: May 2, 2024Inventors: Weiping XIONG, Zhiwei WU, Di GAO, Huan-Shao KUO, Yu-Ren PENG
-
Publication number: 20240030387Abstract: A light-emitting includes an epitaxial structure, a diffusion blocking layer, an ohmic contact layer, a first electrode, and a second electrode. The epitaxial structure includes a first semiconductor layer, an active layer, and a second semiconductor layer disposed sequentially in such order. The diffusion blocking layer is disposed on a surface of the first semiconductor layer opposite to the active layer. The ohmic contact layer is disposed on a surface of the diffusion blocking layer opposite to the first semiconductor layer. The first electrode is disposed on a surface of the ohmic contact layer opposite to the diffusion blocking layer and is electrically connected to the first semiconductor layer. The second electrode is disposed on a surface of the second semiconductor layer adjacent to the active layer and is electrically connected to the second semiconductor layer. A method for manufacturing the light-emitting device is also provided.Type: ApplicationFiled: July 7, 2023Publication date: January 25, 2024Inventors: Zhiwei WU, Yanyun WANG, Weiping XIONG, Liguo ZHANG, Huanshao KUO
-
Publication number: 20240014347Abstract: A light-emitting device includes a semiconductor substrate, an epitaxial structure that has a first surface facing the semiconductor substrate and a second surface opposite to the first surface, and a transparent bonding structure that is disposed between the first surface and the semiconductor substrate. The transparent bonding structure has a first bonding surface facing the first surface of the epitaxial structure and a second bonding surface opposite to the first bonding surface, and has a slit extending from the first bonding surface toward the second bonding surface and terminating at a position that is a distance away from the second bonding surface. A method for manufacturing a light-emitting device is also provided.Type: ApplicationFiled: July 3, 2023Publication date: January 11, 2024Inventors: Zhiwei WU, Yanyun WANG, Di GAO, Liguo ZHANG, Weiping XIONG
-
Publication number: 20230170439Abstract: A light-emitting device includes a semiconductor structure having a first semiconductor layer, an active layer, and a second semiconductor layer. The second semiconductor layer and the active layer formed on a top surface of the first semiconductor layer exposes a portion of the top surface. A first strip electrode is connected to the exposed top surface. A second strip electrode is connected to the second semiconductor layer. When first and second electrodes are projected on a plane, two parallel lines, that contact two opposite ends of the first electrode and perpendicularly intersect a straight line connecting between two opposite ends of the second electrode, define on the straight line a length, which does not extend beyond a distance between the two opposite ends of the second electrode.Type: ApplicationFiled: November 11, 2022Publication date: June 1, 2023Inventors: Zhiwei WU, Yanyun WANG, Weiping XIONG, Di GAO, Yu-Ren PENG, Huanshao KUO
-
Publication number: 20220231197Abstract: A flip-chip light emitting device includes a substrate, a light-emitting layer, a bonding layer disposed between the substrate and the light-emitting layer, and a protective insulating layer disposed over the light-emitting layer and the bonding layer. The bonding layer has first and second upper surfaces that respectively have different first and second roughnesses.Type: ApplicationFiled: April 8, 2022Publication date: July 21, 2022Inventors: Weiping XIONG, Xin WANG, Zhiwei WU, Di GAO, Chun-I WU, Duxiang WANG
-
Publication number: 20220140203Abstract: A flip-chip light-emitting diode includes a first conductivity type semiconductor layer, a light-emitting layer, a second conductivity type semiconductor layer, a first transparent dielectric layer, a second transparent dielectric layer, and a distributed Bragg reflector (DBR) structure which are sequentially stacked. The first transparent dielectric layer has a thickness greater than ?/2n1, and the second transparent dielectric layer has a thickness of m?/4n2, wherein m is an odd number, ? is an emission wavelength of the light-emitting layer, n1 is a refractive index of the first transparent dielectric layer, and n2 is a refractive index of the second transparent dielectric layer and is greater than n1.Type: ApplicationFiled: January 7, 2022Publication date: May 5, 2022Applicant: Tianjin Sanan Optoelectronics Co., Ltd.Inventors: Weiping XIONG, Xin WANG, Zhiwei WU, Di GAO, Yu-Ren PENG, Huan-shao KUO
-
Patent number: 11322657Abstract: A flip-chip light emitting device includes a transparent substrate, an epitaxial light-emitting structure, a transparent bonding layer interposed between the transparent substrate and the light-emitting structure, and a protective insulating layer disposed over the light-emitting structure and the bonding layer. The transparent bonding layer has a smaller-thickness section that has a first contact surface for the protective insulating layer to be disposed thereover, and a larger-thickness section that has a second contact surface meshing with and bonded to a roughened bottom surface of the light-emitting structure. The first contact surface is smaller in roughness than the second contact surface. A method for producing the device is also disclosed.Type: GrantFiled: August 25, 2020Date of Patent: May 3, 2022Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.Inventors: Weiping Xiong, Xin Wang, Zhiwei Wu, Di Gao, Chun-I Wu, Duxiang Wang
-
Publication number: 20210066551Abstract: A flip-chip light emitting device includes a transparent substrate, an epitaxial light-emitting structure, a transparent bonding layer interposed between the transparent substrate and the light-emitting structure, and a protective insulating layer disposed over the light-emitting structure and the bonding layer. The transparent bonding layer has a smaller-thickness section that has a first contact surface for the protective insulating layer to be disposed thereover, and a larger-thickness section that has a second contact surface meshing with and bonded to a roughened bottom surface of the light-emitting structure. The first contact surface is smaller in roughness than the second contact surface. A method for producing the device is also disclosed.Type: ApplicationFiled: August 25, 2020Publication date: March 4, 2021Inventors: Weiping XIONG, Xin WANG, Zhiwei WU, Di GAO, Chun-I WU, Duxiang WANG
-
Patent number: 10672953Abstract: A light-emitting diode (LED) includes an epitaxial laminated layer with an upper surface and an opposing lower surface, the LED including: a first-type semiconductor layer; an active layer; and a second-type semiconductor layer. A portion of the first-type semiconductor layer and the active layer are etched to expose a portion of the second-type semiconductor layer; a first electrode and a second electrode are disposed over the lower surface of the epitaxial laminated layer; the first electrode is disposed over a surface of the first-type semiconductor layer; the second electrode is disposed over a surface of the exposed second-type semiconductor layer; a transparent medium layer over the upper surface of the epitaxial laminated layer, having a refractive index n1> 1.6; a transparent bonding medium layer over one upper surface of the transparent medium layer, having a refractive index n2<n1.Type: GrantFiled: October 29, 2019Date of Patent: June 2, 2020Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Weiping Xiong, Shu-fan Yang, Meijia Yang, Chun-Yi Wu, Chaoyu Wu, Duxiang Wang
-
Publication number: 20200066940Abstract: A light-emitting diode (LED) includes an epitaxial laminated layer with an upper surface and an opposing lower surface, the LED including: a first-type semiconductor layer; an active layer; and a second-type semiconductor layer. A portion of the first-type semiconductor layer and the active layer are etched to expose a portion of the second-type semiconductor layer; a first electrode and a second electrode are disposed over the lower surface of the epitaxial laminated layer; the first electrode is disposed over a surface of the first-type semiconductor layer; the second electrode is disposed over a surface of the exposed second-type semiconductor layer; a transparent medium layer over the upper surface of the epitaxial laminated layer, having a refractive index n1>1.6; a transparent bonding medium layer over one upper surface of the transparent medium layer, having a refractive index n2<n1.Type: ApplicationFiled: October 29, 2019Publication date: February 27, 2020Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Weiping XIONG, Shu-fan YANG, Meijia YANG, Chun-Yi WU, Chaoyu WU, Duxiang WANG
-
Patent number: 10497837Abstract: A flip-chip light-emitting diode chip with a patterned transparent bonding layer includes: an epitaxial laminated layer, having an upper surface and a lower surface opposite to each other, which further includes an n-type semiconductor layer, an active layer and a p-type semiconductor layer. Part of the n-type semiconductor layer and the active layer are etched to expose part of the p-type semiconductor layer. A first electrode is over the surface of the n-type semiconductor layer, and a second electrode is over the surface of the exposed p-type semiconductor layer. A transparent medium layer over the upper surface of the epitaxial laminated layer, wherein the upper surface is provided with a grid-shaped or array-shaped recess region. A patterned transparent bonding medium layer fills up the recess region of the transparent medium layer, and the upper surface is at the same plane with the upper surface of the transparent medium layer.Type: GrantFiled: December 31, 2017Date of Patent: December 3, 2019Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Weiping Xiong, Shu-fan Yang, Meijia Yang, Chun-Yi Wu, Chaoyu Wu, Duxiang Wang
-
Publication number: 20180122994Abstract: A flip-chip light-emitting diode chip with a patterned transparent bonding layer includes: an epitaxial laminated layer, having an upper surface and a lower surface opposite to each other, which further includes an n-type semiconductor layer, an active layer and a p-type semiconductor layer. Part of the n-type semiconductor layer and the active layer are etched to expose part of the p-type semiconductor layer. A first electrode is over the surface of the n-type semiconductor layer, and a second electrode is over the surface of the exposed p-type semiconductor layer. A transparent medium layer over the upper surface of the epitaxial laminated layer, wherein the upper surface is provided with a grid-shaped or array-shaped recess region. A patterned transparent bonding medium layer fills up the recess region of the transparent medium layer, and the upper surface is at the same plane with the upper surface of the transparent medium layer.Type: ApplicationFiled: December 31, 2017Publication date: May 3, 2018Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Weiping XIONG, Shu-fan YANG, Meijia YANG, Chun-Yi WU, Chaoyu WU, Duxiang WANG
-
Publication number: 20170338361Abstract: A flip-chip multi junction solar cell chip integrated with a bypass diode includes from up to bottom: a glass cover; a transparent bonding layer; a front electrode; an n/p photoelectric conversion layer; a p/n tunnel junction; a structure layer of the n/p bypass diode; a first backside electrode; a second backside electrode. The solar cell chip also includes at least a through hole extending through the n/p photoelectric conversion layer, the p/n tunnel junction and the structure layer of the n/p bypass diode. An ultra-thin substrate-less cell can therefore be provided without occupying effective light receiving areas, greatly improving cell heat dissipation. With a light weight, the chip can also have advantages in space power application.Type: ApplicationFiled: August 5, 2017Publication date: November 23, 2017Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Weiping XIONG, Jingfeng BI, Wenjun CHEN, Guanzhou LIU, Meijia YANG, Mingyang LI, Chaoyu WU, Duxiang WANG
-
Patent number: 9437769Abstract: A four-junction quaternary compound solar cell and a method thereof are provided. Forming a first subcell (100) with a first band gap, a lattice constant matching with the substrate on an InP grown substrate, forming a second subcell (200) with a second band gap bigger than the first band gap, a lattice constant matching with the substrate on the first subcell, forming a graded buffer layer (600) with a third band gap bigger than the second band gap on the second subcell, forming a third subcell (300) with a fourth band gap bigger than the third band gap, a lattice constant smaller than the substrate on the graded buffer layer, forming a fourth subcell (400) with a fifth band gap bigger than the fourth band gap, a lattice constant matching with the third subcell on the third subcell, and then forming the required four-junction solar cell then by succeeding process including removing the grown substrate, bonding a support substrate, forming electrodes, evaporating an anti-reflect film and so on.Type: GrantFiled: December 21, 2012Date of Patent: September 6, 2016Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.Inventors: Jingfeng Bi, Guijiang Lin, Jianqing Liu, Weiping Xiong, Minghui Song, Liangjun Wang, Jie Ding, Zhidong Lin
-
Patent number: 9318643Abstract: A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO2 mask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiO2 mask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.Type: GrantFiled: January 4, 2014Date of Patent: April 19, 2016Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Minghui Song, Guijiang Lin, Zhihao Wu, Liangjun Wang, Jianqing Liu, Jingfeng Bi, Weiping Xiong, Zhidong Lin
-
Publication number: 20150171245Abstract: A flip-chip solar cell chip includes a bonding transfer substrate; a metal bonding layer; a flip-chip solar cell epitaxial layer that bonds with the bonding transfer substrate with the metal bonding layer; the flip-chip solar cell epitaxial layer and the metal bonding layer are divided into two or more portions; the surface of the flip-chip solar cell epitaxial layer has a front electrode; and the metal bonding layer is connected with the ends of the front electrode to form a series connection of the divided epitaxial layer. Advantageously, the division of the solar cell epitaxial layer into a plurality of completely-separated portions greatly reduces photo currents and power loss of cell chip series resistance while realizing multiplied increase of output voltage, thereby improving photoelectric conversion efficiency. The use of metal bonding layer as the back electrode realizes extremely low resistance loss of the back electrode.Type: ApplicationFiled: February 27, 2015Publication date: June 18, 2015Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: WEIPING XIONG, GUIJIANG LIN, ZHIMIN WU, MINGHUI SONG, HUI AN
-
Patent number: 9006562Abstract: A high-concentration solar cell includes an epitaxial layer structure, an upper patterned electrode on the top surface, and a back electrode on the back surface. The upper patterned electrode includes a primary pattern and a secondary pattern, where the primary pattern is composed of a series of small metal isosceles trapezoids around the perimeter of the cell. The narrower base of each metal trapezoid points toward an interior of the cell. A lead soldering pad is located within each metal trapezoid for being soldered to an external conductor for carrying the solar cell current. The secondary pattern consists of thin spaced conductors that connect to the angled sides and base of each trapezoid and spread current across the top surface of the cell. The current along the angled sides of each trapezoid is well-distributed to all the spaced conductors connected to the angled sides to avoid current crowding.Type: GrantFiled: May 7, 2012Date of Patent: April 14, 2015Inventors: Weiping Xiong, Guijiang Lin, Minghui Song, Zhimin Wu, Zhaoxuan Liang, Zhidong Lin
-
Publication number: 20140373907Abstract: A four-junction quaternary compound solar cell and a method thereof are provided.Type: ApplicationFiled: December 21, 2012Publication date: December 25, 2014Applicant: Xiamen Sanan Optoelectronics Technology Co., Ltd.Inventors: Jingfeng Bi, Guijiang Lin, Jianqing Liu, Weiping Xiong, Minghui Song, Liangjun Wang, Jie Ding, Zhidong Lin
-
Publication number: 20140120656Abstract: A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiO2 mask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiO2 mask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiO2 mask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.Type: ApplicationFiled: January 4, 2014Publication date: May 1, 2014Applicant: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: MINGHUI SONG, GUIJIANG LIN, ZHIHAO WU, LIANGJUN WANG, JIANQING LIU, JINGFENG BI, WEIPING XIONG, ZHIDONG LIN