Abstract: The disclosure discloses a pixel structure. The pixel structure at least includes a first pixel electrode and a second pixel electrode disposed adjacently. The first pixel electrode includes a first effective display section and a first ineffective display section. The second pixel electrode includes a second effective display section and a second ineffective display section. A display area of the first effective display section is smaller than a display area of the second effective display section. A ratio of an actual coverage area of the second pixel electrode to an actual coverage area of the first pixel electrode is in a range of 1˜2/3.

Abstract: A display pixel structure includes a plurality of pixel units arranged in an array. Each of the pixel units comprises the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel. Each of the sub-pixels includes a TFT switch. A ratio between a width/length ratio of the TFT switch of one of the first sub-pixel, the second sub-pixel, and the third sub-pixel or an average of width/length ratios of multiple TFT switches thereof and a width/length ratio of the TFT switch of the fourth sub-pixel is equal to a ratio between a storage capacitance of one of the first sub-pixel, the second sub-pixel, and the third sub-pixel or an average of multiple storage capacitances thereof and a storage capacitance of the fourth sub-pixel. An array substrate and a liquid crystal display device are also disclosed.

Abstract: A display pixel structure includes a plurality of pixel units arranged in an array. Each of the pixel units comprises the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel. Each of the sub-pixels includes a TFT switch. A ratio between a width/length ratio of the TFT switch of one of the first sub-pixel, the second sub-pixel, and the third sub-pixel or an average of width/length ratios of multiple TFT switches thereof and a width/length ratio of the TFT switch of the fourth sub-pixel is equal to a ratio between a storage capacitance of one of the first sub-pixel, the second sub-pixel, and the third sub-pixel or an average of multiple storage capacitances thereof and a storage capacitance of the fourth sub-pixel. An array substrate and a liquid crystal display device are also disclosed.

Abstract: The disclosure discloses a pixel structure. The pixel structure at least includes a first pixel electrode and a second pixel electrode disposed adjacently. The first pixel electrode includes a first effective display section and a first ineffective display section. The second pixel electrode includes a second effective display section and a second ineffective display section. A display area of the first effective display section is smaller than a display area of the second effective display section. A ratio of an actual coverage area of the second pixel electrode to an actual coverage area of the first pixel electrode is in a range of 1˜2/3.