Patents by Inventor Wei-Sheng Hsu
Wei-Sheng Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240141123Abstract: A manufacturing method of a modified polymer layer modified by hydroxyapatite is provided in the present disclosure, including following steps: (a) providing a polymer layer; (b) plasma-activating acrylic acid using an atmospheric cold plasma device to modify a surface of the polymer layer to obtain an acrylic-modified polymer layer; (c) immersing the acrylic-modified polymer layer in a first solution containing a calcium ion to obtain a calcium-containing modified layer; and (d) immersing the calcium-containing modified layer in a second solution containing phosphate salt to obtain a modified polymer layer modified by hydroxyapatite.Type: ApplicationFiled: June 9, 2023Publication date: May 2, 2024Inventors: Wei-Yu CHEN, Jui-Sheng LEE, Hui-Ju HSU
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Publication number: 20240106246Abstract: Disclosed is a power storage device and method for discharging the same, which configures the power storage device to perform an electric power output under a discharging limit upon coupling with a load device and before any authentication is conducted. The discharging limit for the electric power output will be lifted only when an authentication result between the power storage device and the load device indicates a successful authentication.Type: ApplicationFiled: September 27, 2023Publication date: March 28, 2024Inventors: Wei-Tsung Huang, I-Sheng Chen, Liang-Yi Hsu
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Patent number: 11940737Abstract: A method includes receiving a device design layout and a scribe line design layout surrounding the device design layout. The device design layout and the scribe line design layout are rotated in different directions. An optical proximity correction (OPC) process is performed on the rotated device design layout and the rotated scribe line design layout. A reticle includes the device design layout and the scribe line design layout is formed after performing the OPC process.Type: GrantFiled: May 7, 2021Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsueh-Yi Chung, Yung-Cheng Chen, Fei-Gwo Tsai, Chi-Hung Liao, Shih-Chi Fu, Wei-Ti Hsu, Jui-Ping Chuang, Tzong-Sheng Chang, Kuei-Shun Chen, Meng-Wei Chen
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Publication number: 20240098492Abstract: During operation, an access point may provide a first WLAN and a second WLAN, where the first WLAN uses a WPA2-compatible authentication protocol and the second WLAN uses a WPA3-compatible authentication protocol. In response to an association request or a probe request associated with (or from) an electronic device, the access point may establish a connection with the electronic device using the first WLAN. Then, the access point may confirm, with a computer system, that a binding between a passphrase associated with the electronic device and the second WLAN exists. Alternatively, when the binding does not exist, the access point may establish the binding in the computer system. Next, the access point may perform a BSS transition of the electronic device from the first WLAN to the second WLAN.Type: ApplicationFiled: September 6, 2023Publication date: March 21, 2024Applicant: ARRIS Enterprises LLCInventors: Wei-Sheng Hsu, Yu-Ting Chang, Weichih Huang, Kuan-Hsun Peng, Weiguo Xie, Christopher Mohammed, Shannon Moyes Clark, Siddhartha Datta, David Burns
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Publication number: 20240078170Abstract: A setting method of in-memory computing simulator includes: performing a plurality of test combinations by an in-memory computing device and recording a plurality of first estimation indices corresponding to the plurality of test combinations respectively, wherein each of the plurality of test combinations includes one of a plurality of neural network models and one of a plurality of datasets, executing a simulator according to the plurality of test combinations by a processing device and recording a plurality of second estimation indices corresponding to the plurality of test combinations respectively, wherein the simulator has a plurality of adjustable settings; calculating a correlation sum according to the plurality of first estimation indices and the plurality of second estimation indices by the processing device, and performing an optimal algorithm to search an optimal parameter in the setting space constructed by the plurality of settings so that the correlation sum is maximal.Type: ApplicationFiled: November 21, 2022Publication date: March 7, 2024Inventors: Ke-Han Li, Chih-Fan Hsu, Yu-Sheng Lin, Wei-Chao CHEN
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Publication number: 20240048609Abstract: An application of a cloud-based controller forwards a message to a message broker of the cloud-based controller. The message is then transmitted to a network device of a wireless communications network over a persistent hypertext transfer protocol (“HTTP”) connection. Thereafter, an acknowledgment is received in response to transmitting the message at a gRPC proxy for the message broker.Type: ApplicationFiled: August 2, 2023Publication date: February 8, 2024Inventors: Chen-Ming Chien, Wei-Sheng Hsu, I-Cheng Liang
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Publication number: 20230307275Abstract: A purge port assembly for a wafer container includes a purge module configured to allow inlet flow of purge gas and a transition portion disposed over an intermediate outlet of the purge module. The transition portion includes a receiver configured to receive the purge gas discharged from the purge module, an outlet connector configured to attach with a diffuser, and an intermediate conduit. The intermediate conduit connects the receiver to the outlet connector and extends from the receiver at an acute angle relative to an axis of the inlet opening of the receiver. The intermediate conduit has a length that spaces apart the outlet connector from the receiver. A wafer container includes a shell and a purge port assembly. The shell includes an interior space. The purge port assembly extends through an opening in the shell into the interior space.Type: ApplicationFiled: March 23, 2023Publication date: September 28, 2023Inventors: Matthew A. Fuller, Wei Sheng Hsu, Kobold Yang, Colton J. Harr
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Patent number: 11665058Abstract: During operation, an electronic device receives a packet or a frame associated with a second electronic device, where the packet or the frame includes information specifying a factory reset command. For example, the second electronic device may be a dynamic host configuration protocol (DHCP) server or may perform functions of a DHCP server. Moreover, the packet or the frame may include an acknowledgment (ACK) in a discover, offer, request and acknowledgment (DORA) procedure, and the information may be included in an option 43 subfield or an option 52 subfield in the packet or the frame. In response to receiving the factory reset command, the electronic device performs a factory reset. Note that the factory reset may restore firmware in the electronic device to a factory-fresh version and a configuration of the electronic device to a factory-fresh state, may erase memory in the electronic device.Type: GrantFiled: July 7, 2020Date of Patent: May 30, 2023Assignee: ARRIS Enterprises, LLCInventors: Subash Tirupachur Comerica, Wenge Ren, Wei Sheng Hsu, Craig Owens
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Publication number: 20230140517Abstract: A computer network device that performs key matching is described. While attempting to establish a secure connection with an electronic device, the computer network device may receive a connection-request message associated with the electronic device. In response, the computer network device may provide a context message addressed to a computer, where the context message requests stored passphrase information associated with the electronic device. Then, the computer network device may receive, associated with the computer, a context response. When the context response indicates that there is no stored passphrase information associated with the electronic device, the computer network device may perform the key matching to identify the passphrase associated with the electronic device. Next, the computer network device may provide, addressed to the computer, the identified passphrase associated with the electronic device or an encryption key corresponding to the identified passphrase for storage by the computer.Type: ApplicationFiled: October 19, 2022Publication date: May 4, 2023Applicant: ARRIS Enterprises LLCInventors: Wei-Sheng Hsu, Chiu-Yi Li, Weichih Huang
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Publication number: 20210136587Abstract: An electronic device (such as an access point) may receive a packet (or a frame) from a second electronic device, where the packet includes an encrypted unique identifier of the second electronic device. For example, the encrypted unique identifier may be included in a manufacturer-specific information element in a management packet. Then, the electronic device may decrypt the encrypted unique identifier using an encryption key or a secure hash function to obtain the unique identifier. Next, the electronic device may determine whether the second electronic device is an instance of an authorized access point in the WLAN based at least in part on the unique identifier. Note that the second electronic device may be an instance of an authorized access point when the unique identifier is associated with a manufacturer of the electronic device and/or the second electronic device.Type: ApplicationFiled: November 3, 2020Publication date: May 6, 2021Applicant: ARRIS Enterprises LLCInventors: Wenge Ren, Bowen Zhang, Wei Sheng Hsu
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Publication number: 20210014110Abstract: During operation, an electronic device receives a packet or a frame associated with a second electronic device, where the packet or the frame includes information specifying a factory reset command. For example, the second electronic device may be a dynamic host configuration protocol (DHCP) server or may perform functions of a DHCP server. Moreover, the packet or the frame may include an acknowledgment (ACK) in a discover, offer, request and acknowledgment (DORA) procedure, and the information may be included in an option 43 subfield or an option 52 subfield in the packet or the frame. In response to receiving the factory reset command, the electronic device performs a factory reset. Note that the factory reset may restore firmware in the electronic device to a factory-fresh version and a configuration of the electronic device to a factory-fresh state, may erase memory in the electronic device.Type: ApplicationFiled: July 7, 2020Publication date: January 14, 2021Applicant: ARRIS Enterprises LLCInventors: Subash Tirupachur Comerica, Wenge Ren, Wei Sheng Hsu, Craig Owens
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Patent number: 7706485Abstract: The present invention provides a radio interference indicator comprising a controller for processing an instruction and a radio signal receiver coupled to the controller to receive or detect a radio signal. An indicating element is coupled to the controller to indicate the level of the radio signal to allow the user knows the quality of the background the radio signal.Type: GrantFiled: November 25, 2005Date of Patent: April 27, 2010Assignee: Accton Technology CorporationInventors: Tan-Chun Lu, Kuen-Ruey Lu, Wei-Sheng Hsu, Kung-Wei Tao, Bor-Wen Yang
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Publication number: 20100041192Abstract: A method for preparing a multi-level flash memory structure comprises the steps of forming a protrusion in a semiconductor substrate, forming a plurality of storage structures at the sides of the protrusion, forming a dielectric layer overlying the storage structures and the protrusion of the semiconductor substrate, forming a gate structure on the dielectric layer, and forming a plurality of diffusion regions at the sides of the protrusion. Each of the storage structures includes a charge-trapping site and an insulation structure isolating the charge-trapping site from the semiconductor substrate.Type: ApplicationFiled: August 12, 2008Publication date: February 18, 2010Applicant: PROMOS TECHNOLOGIES INC.Inventors: Lih Wei Lin, Wei Sheng Hsu
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Publication number: 20100022058Abstract: A method for preparing a multi-level flash memory comprising the steps of forming a recess in a semiconductor substrate, forming a plurality of storage structures at the sides of the recess, and forming a gate structure having a lower block in the recess and an upper block on the lower block. The storage structures are separated by the gate structure, and each of the storage structures includes a charge-trapping site and an insulation structure surrounding the charge-trapping site.Type: ApplicationFiled: July 23, 2008Publication date: January 28, 2010Applicant: PROMOS TECHNOLOGIES INC.Inventors: LIH WEI LIN, WEI SHENG HSU, YAN RU YANG, YEN WEN CHEN
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Publication number: 20100020599Abstract: A multi-level flash memory comprises a semiconductor substrate, a gate structure having a lower block positioned in the semiconductor substrate and an upper block positioned on the semiconductor substrate, and a plurality of storage structures separated by the gate structure. The upper block connects to the lower block of the gate structure, and each of the storage structures includes a charge-trapping site and an insulation structure surrounding the charge-trapping site.Type: ApplicationFiled: July 23, 2008Publication date: January 28, 2010Applicant: PROMOS TECHNOLOGIES INC.Inventors: LIH WEI LIN, WEI SHENG HSU, YAN RU YANG, YEN WEN CHEN
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Publication number: 20100019309Abstract: A multi-level flash memory structure comprises a semiconductor substrate having a protrusion, a plurality of storage structures separated by the protrusion, a dielectric layer overlying the storage structures and the protrusion of the semiconductor substrate, a gate structure positioned on the dielectric layer, and several diffusion regions positioned at the sides of the protrusion. Each of the storage structures includes a charge-trapping site and an insulation structure isolating the charge-trapping site from the semiconductor substrate.Type: ApplicationFiled: July 23, 2008Publication date: January 28, 2010Applicant: PROMOS TECHNOLOGIES INC.Inventors: LIH WEI LIN, WEI SHENG HSU
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Patent number: 7367860Abstract: A vacuuming sintering method for forming a carbon nanotube of a field display is disclosed. A cathode is attached to an anode, and the assembly of the cathode and anode is disposed on a heating element of a vacuum sintering furnace with cathode adjacent to the heating element. Each of the cathode and anode has at least one electrode lead connected to an external voltage source. The internal pressure of the vacuum sintering furnace is reduced, the heating element is activated, and a voltage is provided across the cathode and the anode, such that an electric field is generated between the cathode and the anode. The voltage is switched off after the electric field is formed and continuing heating for a predetermined period of time.Type: GrantFiled: July 6, 2004Date of Patent: May 6, 2008Assignee: Teco Nanotech Co., Ltd.Inventors: Chih-Che Kuo, Wei-Sheng Hsu, Chun-Yen Hsiao
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Publication number: 20080020667Abstract: In a method of uniforming the thickness of a rib, steps are forming a plurality of blocked layers by many times of printing and stack, processing a first pre-bake of each blocked layer printed, processing a second pre-bake of in the final blocked layer, flattening the final blocked layer by the uniform plate, and solidify the blocked layers by a sintering process in the final to form a rip (insulation structure), thereby the thickness of rip being uniform.Type: ApplicationFiled: July 20, 2006Publication date: January 24, 2008Inventors: Wei-Sheng Hsu, Chih-Che Kuo, Chi-Hung Hsiao, Ming-Chun Ho
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Publication number: 20080018218Abstract: A straddling and supporting structure for a field emission display device and a manufacturing method thereof is disclosed. The present invention provides a supporting structure that straddles across electrodes to provide a straddling structure for the conducting lines between the electrodes to shorten the conducting path, and can be used as a vacuum supporting structure between the cathode substrate and the anode substrate.Type: ApplicationFiled: July 24, 2006Publication date: January 24, 2008Inventors: Wei-Sheng Hsu, Cheng-Chieh Kao, Yi-Jung Chung
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Patent number: 7242139Abstract: A luminescent brightness compensation of sub-pixels of tri-electrode based field-emission display. The cathode conductive layers corresponding to sub-pixels constituting a pixel are arranged at various levels according to the respective luminescent efficiencies thereof. Thereby, the color with lower or higher luminescent efficiency obtains a stronger or weaker electric field between anode and cathode, respectively. Therefore, the different luminescent efficiency of three sub-pixels with primary color is compensated.Type: GrantFiled: September 3, 2004Date of Patent: July 10, 2007Assignee: TECO Nanotech Co., Ltd.Inventors: Wei-Sheng Hsu, Chi-Hung Hsiao