Patents by Inventor Wei-Sheng Lin
Wei-Sheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240147661Abstract: A zoned heat dissipation control system for a water cooling radiator and a water cooling heat dissipation system having the zoned heat dissipation control system includes a plurality of fans, a plurality of heat dissipation zones defined on the water cooling radiator, a thermal detector, and a control unit. At least one of the fans is disposed within each of the heat dissipation zones. The thermal detector is disposed within at least one of the heat dissipation zones and configured to detect the temperature of the water cooling radiator. The control unit is electrically connected to the fans and the thermal detector and configured to modulate the rotational speed of the fan within each of the heat dissipation zones based on the detected data from the thermal detector.Type: ApplicationFiled: October 31, 2023Publication date: May 2, 2024Inventors: SHUN-CHIH HUANG, TAI-CHUAN MAO, PO-SHENG CHIU, WEI-EN SHIH, CHIH-CHIA LIN
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Publication number: 20240129291Abstract: The invention discloses a method to set up a cross-domain DDS-secure network and then use it to transmit various kinds of data. To set up the cross-domain DDS-secure network, we first register IoT and monitor devices on the administration website. Second, we group devices based on our needs and then ask the website to generate configurations and certificates for each device. Finally, we download those files and deploy them to each device. In an extremely case, we can accomplish all operations only through a mobile device. During the system operating, all devices establish the DDS-secure connections to each other, and data will transmit on the network securely.Type: ApplicationFiled: October 13, 2023Publication date: April 18, 2024Inventors: Tsung-Che Tsai, Wei-Sheng Chen, Hsi-Ching Lin
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Patent number: 11952690Abstract: A breathable and waterproof non-woven fabric is manufactured by a manufacturing method including the following steps. Performing a kneading process on 87 to 91 parts by weight of a polyester, 5 to 7 parts by weight of a water repellent, and 3 to 6 parts by weight of a flow promoter to form a mixture, in which the polyester has a melt index between 350 g/10 min and 1310 g/10 min at a temperature of 270° C., and the mixture has a melt index between 530 g/10 min and 1540 g/10 min at a temperature of 270° C. Performing a melt-blowing process on the mixture, such that the flow promoter is volatilized and a melt-blown fiber is formed, in which the melt-blown fiber has a fiber body and the water repellent disposed on the fiber body with a particle size (D90) between 350 nm and 450 nm.Type: GrantFiled: December 1, 2021Date of Patent: April 9, 2024Assignee: TAIWAN TEXTILE RESEARCH INSTITUTEInventors: Ying-Chi Lin, Wei-Hung Chen, Li-Chen Chu, Rih-Sheng Chiang
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Patent number: 11955070Abstract: A first driver circuit is configured to cooperate with a second driver circuit to control a display panel, wherein the first driver circuit is configured to output display data to a first area of the display panel and the second driver circuit is configured to output display data to a second area of the display panel. A method used for the first driver circuit includes outputting at least one emission control signal to control the second area of the display panel when the second driver circuit is disabled.Type: GrantFiled: November 22, 2021Date of Patent: April 9, 2024Assignee: NOVATEK Microelectronics Corp.Inventors: Kun-Zheng Lin, Chang-Hung Chen, Wei-Chieh Lin, Po-Sheng Liao
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Patent number: 11943525Abstract: An electronic camera assembly includes a camera chip cube bonded to camera bondpads of an interposer; at least one light-emitting diode (LED) bonded to LED bondpads of the interposer at the same height as the camera bondpads; and a housing extending from the interposer and LEDs to the height of the camera chip cube, with light guides extending from the LEDs through the housing to a top of the housing. In embodiments, the electronic camera assembly includes a cable coupled to the interposer. In typical embodiments the camera chip cube has footprint dimensions of less than three and a half millimeters square.Type: GrantFiled: February 17, 2022Date of Patent: March 26, 2024Assignee: OmniVision Technologies, Inc.Inventors: Teng-Sheng Chen, Wei-Ping Chen, Jau-Jan Deng, Wei-Feng Lin
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Publication number: 20240096787Abstract: A semiconductor device structure is provided. The semiconductor device structure includes an interconnection structure over a semiconductor substrate and a conductive pillar over the interconnection structure. The conductive pillar has a protruding portion extending towards the semiconductor substrate from a lower surface of the conductive pillar. The semiconductor device structure also includes an upper conductive via between the conductive pillar and the interconnection structure and a lower conductive via between the upper conductive via and the interconnection structure. The lower conductive via is electrically connected to the conductive pillar through the upper conductive via. The conductive pillar extends across opposite sidewalls of the upper conductive via and opposite sidewalls of the lower conductive via. A top view of an entirety of the second conductive via is separated from a top view of an entirety of the protruding portion.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Ming-Da CHENG, Wei-Hung LIN, Hui-Min HUANG, Chang-Jung HSUEH, Po-Hao TSAI, Yung-Sheng LIN
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Publication number: 20240090796Abstract: A foot sensor and analysis device, which includes a pressure sensing layer arranged inside the insole and a sensing module installed inside the insole. The sensing module is electrically coupled with the pressure sensing layer for receiving and processing detected electronic signals, where sensing module includes an inductance coil to perform wireless charging to the battery. The pressure sensing layer and the sensing module are integrally formed inside the insole.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Yao-Sheng Chou, Hsiao-Yi Lin, Wei-Sheng Su, Hsing-Yu Chi
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Patent number: 11935878Abstract: A method for manufacturing a package structure includes providing a carrier board; providing at least one die having a top surface, a bottom surface, and a side surface on the carrier board; and forming a protective layer to cover at least a portion of the side surface of the die. The die includes a substrate, a semiconductor layer, a gate structure, a source structure and a drain structure, at least one dielectric layer, and at least one pad. The semiconductor layer is disposed on the substrate. The gate structure is disposed on the semiconductor layer. The source and the drain structures are disposed on opposite sides of the gate structure. The dielectric layer covers the gate, source, and drain structures. The pad is disposed on the dielectric layer and penetrates through the dielectric layer to electrically contact with the gate, source or drain structure.Type: GrantFiled: September 10, 2021Date of Patent: March 19, 2024Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Hsiu-Mei Yu, Guang-Yuan Jiang, Cheng-Yi Hsieh, Wei-Chan Chang, Chang-Sheng Lin
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Patent number: 11935958Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first stacked nanostructure and a second stacked nanostructure formed over a substrate. The semiconductor device structure includes a first gate structure formed over the first stacked nanostructure, and the first gate structure includes a first portion of a gate dielectric layer and a first portion of a filling layer. The semiconductor device structure includes a second gate structure formed over the second stacked nanostructure, and the second gate structure includes a second portion of the gate dielectric layer and a second portion of the filling layer. The semiconductor device structure includes a first isolation layer between the first gate structure and the second gate structure, wherein the first isolation layer has an extending portion which is formed in a recess between the gate dielectric layer and the filling layer.Type: GrantFiled: March 27, 2023Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chao Lin, Wei-Sheng Yun, Tung-Ying Lee
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Publication number: 20240086358Abstract: A processing element array includes N processing elements (PE) arranged linearly, N?2, and an operating method of the PE array includes: performing a first data transmission procedure, where an initial value of I is 1 and the first data transmission procedure includes: operating, by an ith PE, according to a first datum stored in itself, and sending the first datum to other PEs for their operations, adding 1 to I when I<N, and performing the first data transmission procedure again, performing a second data transmission procedure when I is equal to N, which includes: operating, by the Jth PE, according to a second datum stored in itself, and sending the second datum to other PEs for their operations, reducing J by 1 when J>1 and the (J?1)th PE has the second datum, and performing the second data transmission procedure again.Type: ApplicationFiled: November 17, 2022Publication date: March 14, 2024Inventors: Yu-Sheng Lin, Trista Pei-Chun CHEN, Wei-Chao CHEN
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Publication number: 20240078170Abstract: A setting method of in-memory computing simulator includes: performing a plurality of test combinations by an in-memory computing device and recording a plurality of first estimation indices corresponding to the plurality of test combinations respectively, wherein each of the plurality of test combinations includes one of a plurality of neural network models and one of a plurality of datasets, executing a simulator according to the plurality of test combinations by a processing device and recording a plurality of second estimation indices corresponding to the plurality of test combinations respectively, wherein the simulator has a plurality of adjustable settings; calculating a correlation sum according to the plurality of first estimation indices and the plurality of second estimation indices by the processing device, and performing an optimal algorithm to search an optimal parameter in the setting space constructed by the plurality of settings so that the correlation sum is maximal.Type: ApplicationFiled: November 21, 2022Publication date: March 7, 2024Inventors: Ke-Han Li, Chih-Fan Hsu, Yu-Sheng Lin, Wei-Chao CHEN
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Publication number: 20240076797Abstract: A susceptor assembly for supporting a crucible during a crystal growth process includes a susceptor base, a tubular sidewall connected to the susceptor base, and a removable sacrifice ring interposed between the susceptor base and the sidewall. Each of the susceptor base and the sidewall is formed of a carbon-containing material. The susceptor base has an annular wall and a shoulder extending radially outward from an outer surface of the annular wall. The sidewall has a first end that receives the annular wall to connect the sidewall to the susceptor base. The sacrifice ring has a first surface that faces the outer surface of the annular wall, a second surface that faces an interior surface of the sidewall, and a ledge extending outward from the second surface that engages the first end of the sidewall.Type: ApplicationFiled: September 7, 2022Publication date: March 7, 2024Inventors: Hong-Huei Huang, Benjamin Michael Meyer, Chun-Sheng Wu, Wei-Chen Chou, Chen-Yi Lin, Feng-Chien Tsai
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Patent number: 10355149Abstract: A tandem solar cell module includes a transparent substrate, a first solar cell unit, and a second solar cell unit disposed between the transparent substrate and the first solar cell unit. The first solar cell unit includes a first electrode, a second electrode, and a first absorption layer disposed between the first electrode and the second electrode, and the second solar cell unit includes a third electrode, a fourth electrode, and a second absorption layer disposed between the third electrode and the fourth electrode, wherein the second electrode is located adjacent to the third electrode, and the positions of the second electrode, the third electrode, and the fourth electrode are corresponding to each other.Type: GrantFiled: September 21, 2016Date of Patent: July 16, 2019Assignee: Industrial Technology Research InstituteInventors: Chia-Wen Chang, Yung-Tsung Liu, Wei-Sheng Lin
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Publication number: 20190199281Abstract: A combined solar cell module includes a solar cell module, an end connection device, and an output connection device. The solar cell module includes first and second connection portions on opposite sides of a substrate, and connection lines which connect solar cells to the first and second connection portions. The first connection portion has a first holding space. The second connection portion has a second holding space corresponding to the first holding space in an up-and-down manner. First and second connection parts are within the first and second holding spaces respectively. At least one of the first and second connection parts is a magnetic material, and another one is a magnetic material or a magnetically attractable material. The end connection device and the first connection portion are detachable and connectable. The output connection device and the second connection portion are detachable and connectable, for outputting current generated by solar cells.Type: ApplicationFiled: December 22, 2018Publication date: June 27, 2019Applicant: Industrial Technology Research InstituteInventors: Jen-Chuan Chang, Tung-Po Hsieh, Chien-Rong Huang, Wei-Sheng Lin, Chien-Hsing Lee, Chin-Jen Chuang
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Publication number: 20190172962Abstract: An encapsulation structure and a solar cell module are provided, wherein the encapsulation structure is disposed on the light incident surface of the solar cell module and is consisted of a thermoplastic protective layer, a transparent water-barrier layer, and an adhesive layer. The thermoplastic protective layer is disposed on the outermost layer of the light incident surface, and the material thereof includes thermoplastic polyurethane (TPU), thermoplastic polyolefin (TPO), or thermoplastic elastomer (TPE). The transparent water-barrier layer is disposed between the adhesive layer and the thermoplastic protective layer.Type: ApplicationFiled: December 29, 2017Publication date: June 6, 2019Applicant: Industrial Technology Research InstituteInventors: Wei-Sheng Lin, Chien-Rong Huang, Tung-Po Hsieh
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Publication number: 20180178429Abstract: A molding apparatus is provided, including a mold, a measurement device configured for sensing a state of the mold, and a calibration device electrically connected to the measurement device and configured for determining a state of a sensing function of the measurement device. Therefore, the problem that the measurement device is too old to accurately sense the state of the mold is solved.Type: ApplicationFiled: April 25, 2017Publication date: June 28, 2018Inventors: Yuan-Hong Sun, Wei-Sheng Lin, Yu-Sheng Chang, Yu-Hsiang Lee, Chien-Chih Chen, An-Fu Lee
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Publication number: 20170365728Abstract: A tandem solar cell module includes a transparent substrate, a first solar cell unit, and a second solar cell unit disposed between the transparent substrate and the first solar cell unit. The first solar cell unit includes a first electrode, a second electrode, and a first absorption layer disposed between the first electrode and the second electrode, and the second solar cell unit includes a third electrode, a fourth electrode, and a second absorption layer disposed between the third electrode and the fourth electrode, wherein the second electrode is located adjacent to the third electrode, and the positions of the second electrode, the third electrode, and the fourth electrode are corresponding to each other.Type: ApplicationFiled: September 21, 2016Publication date: December 21, 2017Applicant: Industrial Technology Research InstituteInventors: Chia-Wen Chang, Yung-Tsung Liu, Wei-Sheng Lin
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Publication number: 20170323986Abstract: A PV module includes a transparent substrate, a first solar cell unit, a crystalline silicon solar cell, and a spacer. The first solar cell unit is between the transparent substrate and the crystalline silicon solar cell, and the first solar cell unit includes a first electrode, a second electrode, and a I-III-VI semiconductor layer between the first electrode and the second electrode. The I-III-VI semiconductor layer includes at least gallium (Ga) and sulfur (S), and the energy gap thereof is more than that of crystalline silicon. Moreover, the crystalline silicon solar cell and the first solar cell unit are separated by the spacer.Type: ApplicationFiled: July 19, 2017Publication date: November 9, 2017Applicant: Industrial Technology Research InstituteInventors: Chia-Wen Chang, Wei-Sheng Lin, Sung-Yu Chen, Hsi-Chuan Chen
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Publication number: 20170207362Abstract: A method for forming a thin film having sulfide single-crystal nanoparticles includes dropping a sulfide precursor solution on the surface of a Group VI absorption layer, and then performing thermal decomposition on the sulfide precursor solution under a predetermined temperature to form a thin film consisting of sulfide single-crystal nanoparticles on the surface of the Group VI absorption layer.Type: ApplicationFiled: April 5, 2017Publication date: July 20, 2017Applicant: Industrial Technology Research InstituteInventors: Tung-Po Hsieh, Wei-Sheng Lin, Jen-Chuan Chang, Yung-Tsung Liu
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Publication number: 20170162731Abstract: A PV module includes a transparent substrate, a first solar cell unit, a crystalline silicon solar cell, and a spacer. The first solar cell unit is between the transparent substrate and the crystalline silicon solar cell, and the first solar cell unit includes a first electrode, a second electrode, and a I-III-VI semiconductor layer between the first electrode and the second electrode. The I-III-VI semiconductor layer includes at least gallium (Ga) and sulfur (S), and the energy gap thereof is more than that of crystalline silicon. Moreover, the crystalline silicon solar cell and the first solar cell unit are separated by the spacer.Type: ApplicationFiled: December 30, 2015Publication date: June 8, 2017Inventors: Chia-Wen Chang, Wei-Sheng Lin, Sung-Yu Chen, Hsi-Chuan Chen