Patents by Inventor Wei-Shu Zhou

Wei-Shu Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6522201
    Abstract: Efficiency of an RF/microwave power amplifier is increased at a back-off power level by increasing the load resistance of the amplifier at the reduced output power level as compared to load impedance at a higher power level including full operating power. The different load impedances can be realized with two amplification units in parallel each having different load impedances. Alternatively, a single amplification path can be provided with an output impedance matching network which is selectively bypassed for increased impedance load during back-off power operation. In another embodiment, the output impedance matching network can include a shunt inductance which is selectively switched into the network to increase impedance for back-off power operation.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: February 18, 2003
    Assignee: EiC Corporation
    Inventors: Shuo-Yuan Hsiao, Wei-Shu Zhou, Nanlei Y Larry Wang
  • Patent number: 6521972
    Abstract: An RF microwave power transistor has an input/output feed structure which functions as a low impedance microstrip line by providing a ground plane in close proximity to the feed structure on one surface of a semiconductor body. A second ground plane can be provided on an opposing surface of the semiconductor body with vias interconnecting the first and second ground planes. In addition to reducing feed impedance, a larger total transistor size can be provided before “odd mode oscillation” occurs.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: February 18, 2003
    Assignee: EiC Corporation
    Inventors: Wei-Shu Zhou, Shuo-Yuan Hsiao, Nanlei Larry Wang
  • Patent number: 6326849
    Abstract: In an RF amplifier circuit having a plurality of transistor stages with each transistor having an input terminal for receiving an RF signal, a bias circuit is provided for applying a DC bias to the input terminal of a transistor. An isolation circuit connects a DC power supply to a bias circuit whereby DC voltage from the power terminal is applied to the bias circuit and RF signal from the transistor input terminal is attenuated. The isolation circuit includes a reactive serial path which allows the flow of DC current and presents an impedance to RF current flow and a reactive shunt path to ground which can comprise a capacitor or a serial inductor/capacitor circuit. The reactive serial path can comprise an inductor or an inductor/capacitor parallel circuit.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: December 4, 2001
    Assignee: EiC Corporation
    Inventors: Nanlei Larry Wang, Shuo-Yuan Hsiao, Wei-Shu Zhou, Shihui Xu