Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.

Abstract: A back-end energy storage isolation fly-back conversion apparatus (10) includes a return switch (Q1), a driving switch (Q2), an energy storage capacitor (Cs), a transformer (Ti), a resonant inductor (Lr), a first rectifier (104), an output capacitor (Cout), and a controller (116). The transformer (T1) includes a primary-side winding (Lm) and a secondary-side first winding (102). The return switch (Q1) is turned on by the controller (116), so that the energy storage capacitor (Cs) is charged by a primary-side current (I1) flowing through the resonant inductor (Lr), the primary-side winding (Lm), and the return switch (Q1), and the secondary-side first winding (102) is powered by the primary-side current (I1). When the primary-side current (I1) becomes negative, the energy storage capacitor (Cs) discharges through the return switch (Q1) and the primary-side winding (Lm) and continuously supplies power to the secondary-side first winding (102).

Abstract: An optical device and the prism module thereof are provided. The prism module includes a first prism, a second prism, and a third prism. The second prism is disposed beside the first prism. The third prism is adhered to the second prism. First light enters the first prism, is reflected plural times in the first prism, enters the second prism, and is emitted from the second prism. Second light enters the second prism, is reflected plural times in the second prism, and is emitted from the second prism. Third light sequentially passes through the third prism and the second prism, enters the first prism, is reflected plural times in the first prism, and is emitted from the first prism.

Abstract: Embodiments of this application provide a printed circuit board, including a core board and a substrate. The core board covers and is disposed on an outer surface of the substrate. The core board includes a first conductive layer, a second conductive layer, and a first dielectric layer. The first conductive layer is located on a side that is of the core board and that is away from the substrate, the second conductive layer is located on a side that is of the core board and that is close to the substrate, and the first dielectric layer is located between the first conductive layer and the second conductive layer, and includes a flexible dielectric layer whose Young's modulus is less than or equal to a preset Young's modulus.

Abstract: Provided is a recombinant microorganism including at least two genes for producing itaconic acid and its derived monomers, and the at least two genes are located on the same expression vector. The at least two genes include one encoding cis-aconitic acid decarboxylase and the other one encoding aconitase, and the genome of the recombinant microorganism includes a gene encoding the molecular chaperone protein GroELS. Also provided is a method for producing itaconic acid by using the microorganism.

Abstract: A multi-chip interconnection package structure with a heat dissipation plate and a preparation method thereof are provided. The multi-chip interconnection package structure with a heat dissipation plate includes a fine circuit layer, at least one die, a heat dissipation plate, a plastic package body, and a package circuit layer, the heat dissipation plate is provided on the fine circuit layer, and is mounted on a side of the die away from the fine circuit layer, the plastic package body wraps the die and the heat dissipation plate, and the package circuit layer is provided on the plastic package body.

Abstract: The invention provides a method for preparing pyrrolidone, and the invention provides a method for catalytically preparing pyrrolidone with ?-aminobutyric acid in the presence of carnitine-CoA ligase CaiC. The carnitine-CoA ligase CaiC has an amino acid sequence as shown in SEQ ID NO:1. The ligase has catalytic activity in the cyclization of ?-aminobutyric acid to produce pyrrolidone. The carnitine-CoA ligase provided in the present invention affords a yield of pyrrolidone of 3.26 g/L and a molar yield of 39.53% in 24 h when ?-aminobutyric acid is used as a substrate, thus reducing the production period, improving the production of pyrrolidone, and accelerating the industrialization process of producing pyrrolidone by enzymatic conversion method.

Abstract: A monitoring and early warning system based on the Internet of Things for an ancient building includes an information acquisition system, a service platform and a user side. The information acquisition system is configured to acquire state data of the ancient building and upload the state data to the service platform by means of a 4G/5G gateway. The user side is integrated in a visualization device for a user to manage, analyze and interact with the acquired ancient building data, and the user side includes a monitoring module, a pre-alarm module, a management module and an expert module. The service platform is of a duster system integrating a plurality of applications, caches and database servers. The expert module is of a Res-long short-term memory (Res-LSTM) neural network model for evaluating a crack state of the ancient building.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.

Abstract: A thermally conductive board includes a first metal layer, a second metal layer, and a thermally conductive layer. The material of the first metal layer includes copper, and the first metal layer has a first top surface and a first bottom surface opposite to the first top surface. A first metal coating layer covers the first bottom surface. The material of the second metal layer includes copper, and the second metal layer has a second top surface and a second bottom surface opposite to the second top surface. A second metal coating layer covers the second top surface and faces the first metal coating layer. The thermally conductive layer is an electrically insulator laminated between the first metal coating layer and the second metal coating layer.

Abstract: An image capturing lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, and a sixth lens element. The first lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The second and third lens elements have refractive power. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof. The sixth lens element with refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The image capturing lens assembly has a total of six lens elements with refractive power.

Abstract: Disclosed are computer-implemented or computer-aided method for diagnosing or predicting the risk of obstructive sleep apnea in a subject. The methods comprise determining whether the subject has obstructive sleep apnea based on at least one quantitative ultrasound parameter and/or at least one morphometric parameter.

Abstract: A computer-implemented method for ordinal prediction is provided. The method includes encoding time series data with a temporal encoder to obtain latent space representations. The method includes optimizing the temporal encoder using semi-supervised learning to distinguish different classes in the labeled space using labeled data, and augment the latent space representations using unlabeled training data, to obtain semi-supervised representations. The method further includes discarding a linear layer after the temporal encoder and fixing the temporal encoder. The method also includes training k-1 binary classifiers on top of the semi-supervised representations to obtain k-1 binary predictions. The method additionally includes identifying and correcting inconsistent ones of the k-1 binary predictions by matching the inconsistent ones to consistent ones of the k-1 binary predictions. The method further includes aggregating the k-1 binary predictions to obtain an ordinal prediction.

Abstract: Systems and techniques are provided for integrating laboratory generated nuclear magnetic resonance (NMR) data and NMR logging data. An example method can include obtaining NMR logging data describing one or more downhole NMR measurements captured during a drilling operation in a borehole; modifying the NMR logging data to be compatible with a temperature correction algorithm, yielding modified NMR logging data, the temperature correction algorithm having been determined based on laboratory generated NMR data; and applying the temperature correction algorithm to the modified NMR logging data, yielding temperature corrected NMR logging data.

Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.

Abstract: A user of a network-based system may correspond to a user profile that describes the user. The user profile may describe the user using one or more descriptors of items that correspond to the user (e.g., items owned by the user, items liked by the user, or items rated by the user). In some situations, such a user profile may be characterized as a “taste profile” that describes an array or distribution of one or more tastes, preferences, or habits of the user. Accordingly, the user profile machine within the network-based system may generate the user profile by accessing descriptors of items that correspond to the user, clustering one or more of the descriptors, and generating the user profile based on one or more clusters of the descriptors.

Abstract: Embodiments of this specification provide distributed data processing methods, apparatuses, and devices. One method includes: determining an active vertex set that currently participates in data processing in target graph data, in response to determining that an external memory of a first distributed node stores an active vertex in the active vertex set, determining, from a plurality of predetermined data processing modes, a target data processing mode that matches the active vertex set, determining, based on the target data processing mode, a to-be-updated vertex according to the association relationship with the active vertex, and sending, based on first data of the active vertex in the external memory, a first update message to a target distributed node in which the to-be-updated vertex is located.

Abstract: A method includes placing a polisher head on platen, the polisher head including a set of first magnets, and controlling a set of second magnets to rotate the polisher head on the platen, wherein controlling the set of second magnets includes reversing the polarity of at least one second magnet of the set of second magnets to produce a magnetic force on at least one first magnet of the set of first magnets, wherein the set of second magnets are external to the polisher head.