Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.

Abstract: An interactive exercise apparatus for guiding a user to perform an exercise includes a display device and a detecting device. The display device is configured to display video imagery which shows an instructor image and at least one motion check image. The motion check image corresponds to a predetermined one of a plurality of body parts of the user, which has a motion guide track and a motion achievement evaluation. The detecting device is configured to detect displacement of the body parts. The motion guide track is displayed on a predetermined position of the video imagery with a predetermined track pattern, corresponding to a movement path of the predetermined body part when the user follows movements demonstrated by the instructor image to perform the exercise. The motion achievement evaluation indicates a matching degree determined according to the displacement of the predetermined body part detected by the detecting device.

Abstract: The present invention discloses a DAC method having signal calibration mechanism is provided. Operation states of current sources are controlled to generate an output analog signal by a DAC circuit according to a codeword of an input digital signal. An echo signal is generated by an echo transmission circuit according to the output analog signal. The codeword is mapped to generate an offset signal by a calibration circuit according to a codeword offset mapping table. The offset signal is processed to generate an echo-canceling signal by an echo-canceling circuit. By a calibration parameter calculation circuit, offset amounts are generated according to a difference between the echo signal and the echo-canceling signal, the offset amounts are grouped to perform statistic operation according to the operation states and current offset values are calculated according to calculation among groups and converted to codeword offset values to update the codeword offset mapping table.

Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.

Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.

Abstract: Disclosed herein is a probiotic composition that includes Lactobacillus salivarius subsp. salicinius AP-32, Lactobacillus johnsonii MH-68, and Bifidobacterium animalis subsp. lactis CP-9, which are deposited at the China Center for Type Culture Collection (CCTCC) respectively under accession numbers CCTCC M 2011127, CCTCC M 2011128, and CCTCC M 2014588. A number ratio of Lactobacillus salivarius subsp. salicinius AP-32, Lactobacillus johnsonii MH-68, and Bifidobacterium animalis subsp. lactis CP-9 ranges from 1:0.1:0.1 to 1:1:8. Also disclosed herein is use of the probiotic composition for alleviating type 1 diabetes mellitus (T1DM).

Abstract: A method for producing ?-aminobutyric acid includes cultivating, in a culture medium containing glutamic acid or a salt thereof, a probiotic composition including at least one lactic acid bacterial strain selected from the group consisting of Bifidobacterium breve CCFM1025 which is deposited at the Guangdong Microbial Culture Collection Center under an accession number GDMCC 60386, Lactobacillus acidophilus TYCA06, Lactobacillus plantarum LPL28, and Bifidobacterium longum subsp. infantis BLI-02 which are deposited at the China General Microbiological Culture Collection Center respectively under accession numbers CGMCC 15210, CGMCC 17954, and CGMCC 15212, Lactobacillus salivarius subsp. salicinius AP-32 which is deposited at the China Center for Type Culture Collection under an accession number CCTCC M 2011127, and combinations thereof.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first gate structure over a substrate and laterally surrounded by a first sidewall spacer. The first gate structure protrudes outward from a top of the first sidewall spacer. A second gate structure is over the substrate and is laterally surrounded by a second sidewall spacer. The first gate structure has a first height that is larger than a second height of the second gate structure. The first sidewall spacer has a first cross-sectional profile that is a different shape and a different size than a second cross-sectional profile of the second sidewall spacer.

Abstract: A semiconductor device includes a substrate, a high-Q capacitor, an ultra high density capacitor, and an interconnection. At least one trench is formed in the substrate. The high-Q capacitor is disposed on a surface of the substrate, and includes a bottom electrode, an upper electrode located on the bottom electrode, and a first dielectric layer located between the upper and bottom electrodes. The ultra high density capacitor is disposed on the trench of the substrate, and includes a first electrode conformally deposited in the trench, a second electrode located on the first electrode, and a second dielectric layer located between the first and second electrodes. The interconnection connects one of the upper electrode and the bottom electrode to one of the first electrode and the second electrode, and connects the other of the upper electrode and the bottom electrode to the other of the first electrode and the second electrode.

Abstract: A backlight module includes a glass substrate, a light-outputting sheet, a light guide plate, and a reflective sheet. The light-outputting sheet is disposed under the glass substrate and has a light-outputting region and a light-shielding region. The light-outputting region is disposed corresponding to the glass substrate. The light-shielding region is disposed corresponding to an outer periphery of the glass substrate. The light guide plate is disposed under the light-outputting sheet and has a light guide region and a light mixing region. The light guide region is disposed corresponding to the light-outputting region. The light mixing region is configured to receive light of a light-emitting element and guide the light to the light guide region. The light leaves the light guide region and then sequentially propagates through the light-outputting region and the glass substrate. The reflective sheet is disposed under the light guide plate.

Abstract: A backlight module includes a glass substrate, a light-outputting sheet, a light guide plate, and a reflective sheet. The light-outputting sheet is disposed under the glass substrate and has a light-outputting region and a light-shielding region. The light-outputting region is disposed corresponding to the glass substrate. The light-shielding region is disposed corresponding to an outer periphery of the glass substrate. The light guide plate is disposed under the light-outputting sheet and has a light guide region and a light mixing region. The light guide region is disposed corresponding to the light-outputting region. The light mixing region is configured to receive light of a light-emitting element and guide the light to the light guide region. The light leaves the light guide region and then sequentially propagates through the light-outputting region and the glass substrate. The reflective sheet is disposed under the light guide plate.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.

Abstract: A word line driving circuit includes a first circuit and a second circuit. The first circuit is configured to provide a first word line driving voltage and a second word line driving voltage based on a first control signal, a second control signal, a first bias voltage, a second bias voltage and a base voltage. The second circuit is configured to provide the first control signal and the second control signal based on a third control signal, a fourth control signal, a word line control signal, a reverse word line control signal, the first bias voltage, the second bias voltage and the base voltage. The first bias voltage and the second bias voltage have different levels during the read mode and the program mode for adaptively adjusting the read voltage and the program voltage, thereby improving the data access time.

Abstract: A light-emitting module includes a light guide plate, a light-emitting element, a first reflection layer and a second reflection layer. The light guide plate has a light incident surface, a light exit surface, a first surface, and a second surface. The light incident surface has three edges connected sequentially. The first surface, the light exit surface, and the second surface are connected to the edges respectively. The first surface and the second surface are respectively located on opposite sides of the light guide plate. The light exit surface extends away from the light incident surface and is elongated. The light-emitting element is configured to emit light toward the light incident surface. The first reflection layer is disposed corresponding to the first surface to cover the first surface. The second reflection layer is disposed corresponding to the second surface to cover the second surface.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.

Abstract: A method includes forming a first polymer layer over a plurality of metal pads, and patterning the first polymer layer to forming a plurality of openings in the first polymer layer. The plurality of metal pads are exposed through the plurality of openings. A plurality of conductive vias are formed in the plurality of openings. A plurality of conductive pads are formed over and contacting the plurality of conductive vias. A conductive pad in the plurality of conductive pads is laterally shifted from a conductive via directly underlying, and in physical contact with, the conductive pad. A second polymer layer is formed to cover and in physical contact with the plurality of conductive pads.

Abstract: A power circuit is adapted for providing a programming voltage to an electronic fuse circuit, and includes a pass transistor of a P-type metal-oxide-semiconductor transistor, a buffer circuit, and a bulk voltage control circuit. The pass transistor includes a bulk electrode, a gate electrode, a first source/drain electrode receiving a system high voltage, and a second source/drain electrode connected to a bit line. The buffer circuit provides a control voltage to the gate electrode of the pass transistor. The pass transistor is turned on during a programming operation and turned off during a reading operation. The bulk voltage control circuit independently provides a bulk voltage to the bulk electrode. A last-stage buffer of the buffer circuit is also activated by the bulk voltage to control the pass transistor during the reading operation of the electronic fuse circuit. A method for providing power to an electronic fuse circuit is also provided.

Abstract: In an embodiment, a device includes: an integrated circuit die including a die connector; a dielectric layer on the integrated circuit die; an under-bump metallurgy layer having a line portion on the dielectric layer and having a via portion extending through the dielectric layer to contact the die connector; a through via on the line portion of the under-bump metallurgy layer, the through via having a first curved sidewall proximate the die connector, the through via having a second curved sidewall distal the die connector, the first curved sidewall having a longer arc length than the second curved sidewall; and an encapsulant around the through via and the under-bump metallurgy layer.

Abstract: The current disclosure describes techniques of protecting a metal interconnect structure from being damaged by subsequent chemical mechanical polishing processes used for forming other metal structures over the metal interconnect structure. The metal interconnect structure is receded to form a recess between the metal interconnect structure and the surrounding dielectric layer. A metal cap structure is formed within the recess. An upper portion of the dielectric layer is strained to include a tensile stress which expands the dielectric layer against the metal cap structure to reduce or eliminate a gap in the interface between the metal cap structure and the dielectric layer.

Abstract: A power circuit is adapted for providing a programming voltage to an electronic fuse circuit, and includes a pass transistor of a P-type metal-oxide-semiconductor transistor, a buffer circuit, and a bulk voltage control circuit. The pass transistor includes a bulk electrode, a gate electrode, a first source/drain electrode receiving a system high voltage, and a second source/drain electrode connected to a bit line. The buffer circuit provides a control voltage to the gate electrode of the pass transistor. The pass transistor is turned on during a programming operation and turned off during a reading operation. The bulk voltage control circuit independently provides a bulk voltage to the bulk electrode. A last-stage buffer of the buffer circuit is also activated by the bulk voltage to control the pass transistor during the reading operation of the electronic fuse circuit. A method for providing power to an electronic fuse circuit is also provided.