Patents by Inventor Wei-Ti Lin

Wei-Ti Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11348869
    Abstract: A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.
    Type: Grant
    Filed: November 22, 2020
    Date of Patent: May 31, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Chien-Chou Chen, Chun-Hsien Chien, Wen-Liang Yeh, Wei-Ti Lin
  • Publication number: 20220022316
    Abstract: A package carrier includes a build-up circuit structure, a first insulation protective layer, a plurality of connection pads, and a plurality of metal balls. The build-up circuit structure has an upper surface. The first insulation protective layer is disposed on the upper surface of the build-up circuit structure and has a plurality of first openings. The connection pads are respectively disposed in the first openings of the first insulation protective layer and are structurally and electrically connected to the build-up circuit structure. Each of the connection pads has an arc-shaped groove. The metal balls are respectively disposed in the arc-shaped groove of the connection pads. The metal balls and the corresponding connection pads define a plurality of bump structures, and a plurality of top surfaces of the bump structures are on a same plane.
    Type: Application
    Filed: August 19, 2020
    Publication date: January 20, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Po-Wei Chen, Wei-Ti Lin, Chun-Hsien Chien
  • Publication number: 20210398894
    Abstract: A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.
    Type: Application
    Filed: August 16, 2021
    Publication date: December 23, 2021
    Applicant: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Yu-Hua Chen
  • Patent number: 11139234
    Abstract: A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: October 5, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Yu-Hua Chen
  • Publication number: 20210282277
    Abstract: A circuit carrier board includes a first substrate and a second substrate bonding to the first substrate. The first substrate includes a first circuit layer connecting to a plurality of conductive structure. The conductive structures connect to electronic elements. The second substrate contacts the first circuit layer. The second substrate includes a plurality of stacked dielectric layers, and a plurality of second circuit layers are disposed in the dielectric layers. The bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and the topmost layer of the second circuit layers is electrically connected to the first circuit layer. The conductive structure includes a pad and a conductive via. The pad electrically connects to the first circuit layer. A linewidth of the first circuit layer is smaller than a linewidth of the second circuit layer. A manufacturing method of the circuit carrier board is also provided.
    Type: Application
    Filed: May 10, 2021
    Publication date: September 9, 2021
    Applicant: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Fu-Yang Chen
  • Publication number: 20210219435
    Abstract: A circuit carrier board includes a first build-up layer structure, a substrate, an adhesive layer, and a conductive structure. The first build-up layer includes a plurality of first dielectric layers and a plurality of first circuit layers original stacked. The substrate includes a base and a second build-up layer structure disposed on the base. The second build-up layer structure includes a plurality of second dielectric layers and a plurality of second circuit layer original stacked. A top most layer of the second circuit layers is exposed outside of the second dielectric layers. The conductive structure penetrates through the first dielectric layers, the first circuit layers and the adhesive layer, and contacts with the top most layer of the second circuit layers. The conductive structure electrical connects the first circuit layers to the second circuit layers. A manufacturing method of the circuit carrier board is also provided.
    Type: Application
    Filed: April 1, 2021
    Publication date: July 15, 2021
    Applicant: Unimicron Technology Corp.
    Inventors: Chun-Hsien Chien, Wen-Liang Yeh, Wei-Ti Lin
  • Patent number: 11037869
    Abstract: A method of preparing a package structure is provided, which includes providing a carrier plate including a supporting layer, a first release layer, and a first metal layer; forming a first dielectric layer over the first metal layer, the first dielectric layer having a plurality of holes, each of the holes having an end portion substantially coplanar with each other at a same plane; forming a plurality of conductive protrusions filling the holes, each of the conductive protrusions having a first end and a second end opposite thereto; forming a circuit layer structure including at least one circuit layer and at least one second dielectric layer, the circuit layer being connected to the second end, the second dielectric layer being disposed over the circuit layer; removing the carrier plate; and removing a portion of the first dielectric layer to expose the conductive protrusions. A package structure is also provided.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: June 15, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Fu-Yang Chen, Chun-Hsien Chien, Cheng-Hui Wu, Wei-Ti Lin
  • Patent number: 11032917
    Abstract: A circuit carrier board includes a first substrate and a second substrate bonding to the first substrate. The first substrate includes a first circuit layer connecting to a plurality of conductive structure. The conductive structures connect to electronic elements. The second substrate contacts the first circuit layer. The second substrate includes a plurality of stacked dielectric layers, and a plurality of second circuit layers are disposed in the dielectric layers. The bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and the topmost layer of the second circuit layers is electrically connected to the first circuit layer. The conductive structure includes a pad and a conductive via. The pad electrically connects to the first circuit layer. A linewidth of the first circuit layer is smaller than a linewidth of the second circuit layer. A manufacturing method of the circuit carrier board is also provided.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: June 8, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Fu-Yang Chen
  • Patent number: 10999939
    Abstract: A circuit carrier board includes a first build-up layer structure, a substrate, an adhesive layer, and a conductive structure. The first build-up layer includes a plurality of first dielectric layers and a plurality of first circuit layers original stacked. The substrate includes a base and a second build-up layer structure disposed on the base. The second build-up layer structure includes a plurality of second dielectric layers and a plurality of second circuit layer original stacked. A top most layer of the second circuit layers is exposed outside of the second dielectric layers. The conductive structure penetrates through the first dielectric layers, the first circuit layers and the adhesive layer, and contacts with the top most layer of the second circuit layers. The conductive structure electrical connects the first circuit layers to the second circuit layers. A manufacturing method of the circuit carrier board is also provided.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: May 4, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Chun-Hsien Chien, Wen-Liang Yeh, Wei-Ti Lin
  • Patent number: 10950687
    Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: March 16, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Fu-Yang Chen, Chun-Hsien Chien, Chien-Chou Chen, Wei-Ti Lin
  • Publication number: 20210074633
    Abstract: A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.
    Type: Application
    Filed: November 22, 2020
    Publication date: March 11, 2021
    Inventors: Chien-Chou CHEN, Chun-Hsien CHIEN, Wen-Liang YEH, Wei-Ti LIN
  • Publication number: 20210076508
    Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.
    Type: Application
    Filed: November 18, 2020
    Publication date: March 11, 2021
    Applicant: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Chien-Chou Chen, Fu-Yang Chen, Ra-Min Tain
  • Publication number: 20210057320
    Abstract: A method of preparing a package structure is provided, which includes providing a carrier plate including a supporting layer, a first release layer, and a first metal layer; forming a first dielectric layer over the first metal layer, the first dielectric layer having a plurality of holes, each of the holes having an end portion substantially coplanar with each other at a same plane; forming a plurality of conductive protrusions filling the holes, each of the conductive protrusions having a first end and a second end opposite thereto; forming a circuit layer structure including at least one circuit layer and at least one second dielectric layer, the circuit layer being connected to the second end, the second dielectric layer being disposed over the circuit layer; removing the carrier plate; and removing a portion of the first dielectric layer to expose the conductive protrusions. A package structure is also provided.
    Type: Application
    Filed: November 21, 2019
    Publication date: February 25, 2021
    Inventors: Fu-Yang Chen, Chun-Hsien Chien, Cheng-Hui Wu, Wei-Ti Lin
  • Patent number: 10886264
    Abstract: A manufacturing method of the light-emitting diode package structure is provided. A carrier is formed. The carrier comprises a first build-up circuit. At least one self-assembled material layer is formed on the first build-up circuit. A first solder mask layer is formed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the at least one self-assembled material layer. At least one light-emitting diode is disposed on the first build-up circuit. The at least one light-emitting diode has a self-assembled pattern, and the at least one light-emitting diode is self-assembled into the at least one opening of the first solder mask layer through a force between the self-assembled pattern and the at least one self-assembled material layer.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: January 5, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Fu-Yang Chen
  • Patent number: 10888001
    Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: January 5, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Chien-Chou Chen, Fu-Yang Chen, Ra-Min Tain
  • Patent number: 10879167
    Abstract: A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: December 29, 2020
    Assignee: Unimicron Technology Corp.
    Inventors: Chien-Chou Chen, Chun-Hsien Chien, Wen-Liang Yeh, Wei-Ti Lin
  • Publication number: 20200273948
    Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure.
    Type: Application
    Filed: May 15, 2020
    Publication date: August 27, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Fu-Yang Chen, Chun-Hsien Chien, Chien-Chou Chen, Wei-Ti Lin
  • Publication number: 20200266181
    Abstract: A manufacturing method of the light-emitting diode package structure is provided. A carrier is formed. The carrier comprises a first build-up circuit. At least one self-assembled material layer is formed on the first build-up circuit. A first solder mask layer is formed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the at least one self-assembled material layer. At least one light-emitting diode is disposed on the first build-up circuit. The at least one light-emitting diode has a self-assembled pattern, and the at least one light-emitting diode is self-assembled into the at least one opening of the first solder mask layer through a force between the self-assembled pattern and the at least one self-assembled material layer.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 20, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Fu-Yang Chen
  • Patent number: 10700161
    Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure. A substrate structure obtained by the manufacturing method of the substrate structure is provided.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: June 30, 2020
    Assignee: Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Fu-Yang Chen, Chun-Hsien Chien, Chien-Chou Chen, Wei-Ti Lin
  • Patent number: 10700049
    Abstract: A light-emitting diode package structure includes a carrier, at least one self-assembled material layer, a first solder mask layer, and at least one light-emitting diode. The carrier includes a first build-up circuit. The self-assembled material layer is disposed on the first build-up circuit. The first solder mask layer is disposed on the first build-up circuit. The first solder mask layer has at least one opening to expose a portion of the self-assembled material layer. The light-emitting diode is disposed on the first build-up circuit. The light-emitting diode has a self-assembled pattern. The light-emitting diode is self-assembled into the opening of the first solder mask layer through a force between the self-assembled pattern and the self-assembled material layer. A manufacturing method of the light-emitting diode package structure is also provided.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: June 30, 2020
    Assignee: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Fu-Yang Chen