Patents by Inventor Wei-Ting Lai

Wei-Ting Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128324
    Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Shih-Min Chou, Nien-Ting Ho, Wei-Ming Hsiao, Li-Han Chen, Szu-Yao Yu, Chung-Yi Chiu
  • Patent number: 11916077
    Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Ru-Gun Liu, Wei-Cheng Lin, Lei-Chun Chou, Wei-An Lai
  • Patent number: 9876521
    Abstract: A sliding stand assembly comprises a back cover, a sliding engaging member, a spring, a first stand and a second stand. The sliding engaging member is located at a first surface of the back cover. The sliding engaging member comprises first and second protruding portions. The first stand is slidably pivoted to the back cover. The first stand comprises first to third concave portions. The first concave portion has first and second sub-portions. The second stand is pivoted to the first stand and the back cover. When the first stand slides to a positioning location, the first protruding portion is engaged with the first sub-portion and the second protruding portion is located in the second concave portion. When the first protruding portion moves from the first sub-portion to the second sub-portion, the second protruding portion moves to the third concave portion to be positioned.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: January 23, 2018
    Assignee: PEGATRON CORPORATION
    Inventors: Wei-Ting Lai, Shih-Wei Hung
  • Patent number: 9299796
    Abstract: A method for manufacturing a metal-oxide-semiconductor (MOS) gate stack structure in an insta-MOS field-effect-transistor (i-MOSFET) includes the following steps of: forming a silicon nitride layer over a silicon substrate; forming a nanopillar structure including a silicon-germanium alloy layer in contact with the silicon nitride layer; and performing a thermal oxidation process on the nanopillar structure to cause germanium atoms in the silicon-germanium alloy layer to penetrate the underneath silicon nitride layer to form a silicon-germanium shell layer in contact with the silicon substrate and a germanium nanosphere located over the silicon germanium shell layer, and to form a separating layer between the silicon-germanium shell layer and the germanium nanosphere by oxidizing silicon atoms from the silicon nitride layer or the silicon substrate, thereby forming a germanium/silicon dioxide/silicon-germanium i-MOS gate stack structure capable of solving interfacial issues between silicon and germanium and b
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: March 29, 2016
    Assignee: NATIONAL CENTRAL UNIVERSITY
    Inventors: Pei-Wen Li, Wei-Ting Lai, Ting-Chia Hsu, Kuo-Ching Yang, Po-Hsiang Liao, Thomas George
  • Publication number: 20160013283
    Abstract: A method for manufacturing a metal-oxide-semiconductor (MOS) gate stack structure in an insta-MOS field-effect-transistor (i-MOSFET) includes the following steps of: forming a silicon nitride layer over a silicon substrate; forming a nanopillar structure including a silicon-germanium alloy layer in contact with the silicon nitride layer; and performing a thermal oxidation process on the nanopillar structure to cause germanium atoms in the silicon-germanium alloy layer to penetrate the underneath silicon nitride layer to form a silicon-germanium shell layer in contact with the silicon substrate and a germanium nanosphere located over the silicon germanium shell layer, and to form a separating layer between the silicon-germanium shell layer and the germanium nanosphere by oxidizing silicon atoms from the silicon nitride layer or the silicon substrate, thereby forming a germanium/silicon dioxide/silicon-germanium i-MOS gate stack structure capable of solving interfacial issues between silicon and germanium and b
    Type: Application
    Filed: February 11, 2015
    Publication date: January 14, 2016
    Inventors: Pei-Wen Li, Wei-Ting Lai, Ting-Chia Hsu, Kuo-Ching Yang, Po-Hsiang Liao, Thomas George
  • Publication number: 20150349830
    Abstract: A sliding stand assembly comprises a back cover, a sliding engaging member, a spring, a first stand and a second stand. The sliding engaging member is located at a first surface of the back cover. The sliding engaging member comprises first and second protruding portions. The first stand is slidably pivoted to the back cover. The first stand comprises first to third concave portions. The first concave portion has first and second sub-portions. The second stand is pivoted to the first stand and the back cover. When the first stand slides to a positioning location, the first protruding portion is engaged with the first sub-portion and the second protruding portion is located in the second concave portion. When the first protruding portion moves from the first sub-portion to the second sub-portion, the second protruding portion moves to the third concave portion to be positioned.
    Type: Application
    Filed: May 5, 2015
    Publication date: December 3, 2015
    Inventors: Wei-Ting LAI, Shih-Wei HUNG
  • Publication number: 20110085288
    Abstract: An all-in-one desktop computer includes a casing, a display module, a motherboard, a storage device, and a heat dissipating device. The display module is contained in the casing. The display module has a display panel exposed to the casing. The storage device is located at a center-of-gravity position of the all-in-one desktop computer. The motherboard, the storage device, and the heat dissipating device are contained in the casing and are disposed at the back of the display module without overlap. Therefore, the all-in-one desktop computer has smaller volume and a better heat dissipation effect via special disposition of the motherboard, the storage device, and the heat dissipating device.
    Type: Application
    Filed: October 6, 2010
    Publication date: April 14, 2011
    Applicant: PEGATRON CORPORATION
    Inventors: Wei-Chih Lai, Yao-Jen Chang, Wei-Ting Lai, Chia-Fen Tsou, Hsin-Hung Hsiao
  • Publication number: 20080174746
    Abstract: A method for projecting an image transmitting from one of a plurality of hosts by a projection device is disclosed. The method includes: (a) the plurality of hosts each logging into the projection device using wireless communication technology; (b) selecting a first host among the plurality of hosts connected to the projection device; (c) the projection device allowing the selected first host to transmit data to the projection device using wireless communication technology; and (d) the projection device projecting an image corresponding to the data transmitted from the first host.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Inventors: Wei-Ting Lai, Chang-Hung Lee, Chih-Wei Yang
  • Publication number: 20070086373
    Abstract: A wireless base station wirelessly connecting to an electronic apparatus and maintaining a connection via a first packet includes a main body, a receiver, a micro-processor and a transmitter. The receiver is disposed in the main body for receiving a first signal. The micro-processor is for adjusting a state of at least a reserved bit of the first packet to form a second packet according to the received first signal. The transmitter is for sending out the second packet to replace the first packet.
    Type: Application
    Filed: October 5, 2006
    Publication date: April 19, 2007
    Applicant: BenQ Corporation
    Inventors: Chih-Wei Yang, Wei-Ting Lai, Chih-Yang Wang