Patents by Inventor Wei-Ting YEH
Wei-Ting YEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11966031Abstract: An image lens assembly includes, in order from an object side to an image side along an optical path, a first lens group, a second lens group, a third lens group and a fourth lens group. A total number of lens elements in the image lens assembly is seven. The first lens group includes a first lens element with positive refractive power and a second lens element with negative refractive power. Each of the second lens group and the third lens group includes at least one lens element. The fourth lens group includes a seventh lens element. When the image lens assembly is focusing or zooming, a relative position between the first lens group and an image surface is fixed, a relative position between the fourth lens group and the image surface is fixed, and the second lens group and the third lens group move along the optical axis.Type: GrantFiled: November 2, 2021Date of Patent: April 23, 2024Assignee: LARGAN PRECISION CO., LTD.Inventors: Kuan-Ting Yeh, Wei-Yu Chen
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Publication number: 20240118522Abstract: A photographing lens assembly includes, in order from an object side to an image side: a first, a second, a third, a fourth, a fifth and a sixth lens elements. The first lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, wherein the object-side surface has at least one convex critical point in an off-axis region thereof. The third lens element has an image-side surface being convex in a paraxial region thereof. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, and an image-side surface being convex in a paraxial region thereof. The sixth lens element has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface has at least one convex critical point in an off-axis region thereof.Type: ApplicationFiled: December 7, 2023Publication date: April 11, 2024Applicant: LARGAN PRECISION CO., LTD.Inventors: Po-Lun HSU, Wei-Yu CHEN, Kuan-Ting YEH, Ssu-Hsin LIU
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Patent number: 11940597Abstract: An image capturing optical lens system includes four lens elements, which are, in order from an object side to an image side along an optical path, a first lens element, a second lens element, a third lens element and a fourth lens element. The first lens element has an object-side surface being convex in a paraxial region thereof. The third lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The fourth lens element has negative refractive power.Type: GrantFiled: July 15, 2021Date of Patent: March 26, 2024Assignee: LARGAN PRECISION CO., LTD.Inventors: Kuan-Ting Yeh, Wei-Yu Chen
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Patent number: 11918882Abstract: An interactive exercise apparatus for guiding a user to perform an exercise includes a display device and a detecting device. The display device is configured to display video imagery which shows an instructor image and at least one motion check image. The motion check image corresponds to a predetermined one of a plurality of body parts of the user, which has a motion guide track and a motion achievement evaluation. The detecting device is configured to detect displacement of the body parts. The motion guide track is displayed on a predetermined position of the video imagery with a predetermined track pattern, corresponding to a movement path of the predetermined body part when the user follows movements demonstrated by the instructor image to perform the exercise. The motion achievement evaluation indicates a matching degree determined according to the displacement of the predetermined body part detected by the detecting device.Type: GrantFiled: August 5, 2021Date of Patent: March 5, 2024Assignee: Johnson Health Tech Co., Ltd.Inventors: Hsin-Huang Chiang, Yu-Chieh Lee, Ning Chuang, Wei-Ting Weng, Cheng-Ho Yeh
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Publication number: 20240030180Abstract: A method for manufacturing a semiconductor structure includes: forming a first bonding layer on a device substrate formed with a semiconductor device so as to cover the semiconductor device, wherein the first bonding layer includes a first metal oxide material in an amorphous state; forming a second bonding layer on a carrier substrate, wherein the second bonding layer includes a second metal oxide material in an amorphous state; conducting a surface modification process on the first bonding layer and the second bonding layer; bonding the device substrate and the carrier substrate to each other through the first and second bonding layers; and annealing the first and second bonding layers so as to convert the first and second metal oxide materials from the amorphous state to a crystalline state.Type: ApplicationFiled: July 20, 2022Publication date: January 25, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Zheng-Yong LIANG, Wei-Ting YEH, Yu-Yun PENG, Keng-Chu LIN
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Publication number: 20230387312Abstract: A method is provided for forming a semiconductor device. A fin feature is formed on a semiconductor substrate, and a dummy gate feature is formed over the fin feature. The fin feature includes a sacrificial portion disposed over the semiconductor substrate, and a fin portion disposed over the sacrificial portion. The dummy gate feature is connected to the fin feature and the semiconductor substrate. Then, the sacrificial portion is removed to form a gap between the semiconductor substrate and the fin portion. A dielectric isolation layer is formed to fill the gap for electrically isolating the fin portion from the semiconductor substrate. Subsequently, source/drain features are formed over the dielectric isolation layer, and the dummy gate feature is processed to form a gate electrode feature on the fin portion.Type: ApplicationFiled: May 25, 2022Publication date: November 30, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hung-Yu YEN, Wei-Ting YEH, Ko-Feng CHEN, Keng-Chu LIN
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Publication number: 20230178593Abstract: A semiconductor device structure and a formation method are provided. The method includes forming a sacrificial base layer over a substrate and forming a semiconductor stack over the sacrificial base layer. The semiconductor stack has multiple sacrificial layers and multiple semiconductor layers laid out alternately. The method also includes forming a gate stack to partially cover the sacrificial base layer, the semiconductor layers, and the sacrificial layers. The method further includes removing the sacrificial base layer to form a recess between the substrate and the semiconductor stack. In addition, the method includes forming a metal-containing dielectric structure to partially or completely fill the recess. The metal-containing dielectric structure has multiple sub-layers.Type: ApplicationFiled: June 6, 2022Publication date: June 8, 2023Inventors: Wei-Ting Yeh, Hung-Yu Yen, Yu-Yun Peng, Keng-Chu Lin
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Patent number: 11616273Abstract: The disclosure provides a method for manufacturing a separator, comprising the steps of: providing a nonporous precursor substrate; coating a heat-resistant slurry on a surface of the nonporous precursor substrate to form a heat-resistant coating layer, wherein the heat-resistant slurry comprises a binder and a plurality of inorganic particles; and stretching the nonporous precursor substrate with the heat-resistant coating layer formed thereon to generate a separator comprising a porous substrate and a heat-resistant layer; wherein the heat-resistant layer is disposed on the surface of the porous substrate in the range of 10% to 90% of the total surface area of the porous substrate.Type: GrantFiled: March 25, 2022Date of Patent: March 28, 2023Assignee: BenQ Materials CorporationInventors: Wei-Ting Yeh, Yi-Fang Huang, Kai-Wei Cheng, Yu-Ruei Li, Wan-Ting Lo
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Patent number: 11575180Abstract: The disclosure provides a separator comprising a porous substrate and a heat-resistant layer disposed on a surface of the substrate. The heat-resistant layer comprises a binder and a plurality of inorganic particles, wherein the heat-resistant layer is disposed on the surface of the porous substrate in the range of 10% to 90% of the total surface area of the porous substrate.Type: GrantFiled: January 28, 2021Date of Patent: February 7, 2023Assignee: BenQ Materials CorporationInventors: Wei-Ting Yeh, Yi-Fang Huang, Kai-Wei Cheng, Yu-Ruei Li, Wan-Ting Lo
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Publication number: 20230009820Abstract: A semiconductor device with isolation structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate forming a superlattice structure with first and second nanostructured layers on the fin structure, forming a source/drain (S/D) opening in the superlattice structure, forming an isolation opening in the fin structure and below the S/D opening, forming a first isolation layer in the isolation opening, selectively forming an oxide layer on sidewalls of the S/D opening, selectively forming an inhibitor layer on the oxide layer, selectively depositing a second isolation layer on the first isolation layer, and forming S/D regions in the S/D opening on the second isolation layer.Type: ApplicationFiled: February 2, 2022Publication date: January 12, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fu-Ting YEN, Wei-Ting YEH, Shih-Cheng CHEN, Yu-Yun PENG
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Publication number: 20220415696Abstract: The present disclosure describes a method to form a bonded semiconductor structure. The method includes forming a first bonding layer on a first wafer, forming a debonding structure on a second wafer, forming a second bonding layer on the debonding structure, bonding the first and second wafers with the first and second bonding layers, and debonding the second wafer from the first wafer via the debonding structure. The debonding structure includes a first barrier layer, a second barrier layer, and a water-containing dielectric layer between the first and second barrier layers.Type: ApplicationFiled: March 23, 2022Publication date: December 29, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Ting YEH, Zheng Yong Liang, De-Yang Chiou, Yu-Yun Peng, Keng-Chu Lin
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Publication number: 20220216571Abstract: The disclosure provides a method for manufacturing a separator, comprising the steps of: providing a nonporous precursor substrate; coating a heat-resistant slurry on a surface of the nonporous precursor substrate to form a heat-resistant coating layer, wherein the heat-resistant slurry comprises a binder and a plurality of inorganic particles; and stretching the nonporous precursor substrate with the heat-resistant coating layer formed thereon to generate a separator comprising a porous substrate and a heat-resistant layer; wherein the heat-resistant layer is disposed on the surface of the porous substrate in the range of 10% to 90% of the total surface area of the porous substrate.Type: ApplicationFiled: March 25, 2022Publication date: July 7, 2022Applicant: BenQ Materials CorporationInventors: WEI-TING YEH, YI-FANG HUANG, KAI-WEI CHENG, YU-RUEI LI, WAN-TING LO
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Patent number: 11320851Abstract: An all-MOSFET voltage reference circuit includes a first cascaded branch configured to generate a bias current and composed of a first current source and a diode-connected first N-type transistor connected at a first interconnected node; a second cascaded branch composed of a second current source, a diode-connected second N-type transistor and a third N-type transistor connected with the second N-type transistor disposed in between, wherein the second N-type transistor and the third N-type transistor are connected at a second interconnected node; a third cascaded branch composed of a third current source and a diode-connected fourth N-type transistor connected at an output node that provides a reference voltage; and an amplifier with a non-inverting node coupled to the first interconnected node and an inverting node coupled to the second interconnected node. A threshold voltage of the third N-type transistor is larger than a threshold voltage of the second N-type transistor.Type: GrantFiled: December 2, 2020Date of Patent: May 3, 2022Assignees: NCKU Research and Development Foundation, Himax Technologies LimitedInventors: Wei-Ting Yeh, Chien-Hung Tsai
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Publication number: 20210371751Abstract: An aromatic liquid crystal polyester, having repeating units represented by formulae (1) and (2), respectively: where R?, Ar1, Ar2, Ar3, X, Y1, Y2 and Z are those as defined in the specification. Also, a liquid crystal polyester composition including the aromatic liquid crystal polyester and a solvent. The composition has an improved viscosity stability. Also, a liquid crystal polyester film prepared from the liquid crystal polyester composition and a method for manufacturing the same. The liquid crystal polyester film according to the present disclosure has excellent properties such as a low hygroscopicity and a low dissipation factor (Df).Type: ApplicationFiled: May 28, 2021Publication date: December 2, 2021Applicant: ETERNAL MATERIALS CO., LTD.Inventors: JIA-CHENG CHANG, WEI-TING YEH, WEN-CHENG LIU
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Publication number: 20210296734Abstract: The disclosure provides a separator comprising a porous substrate and a heat-resistant layer disposed on a surface of the substrate. The heat-resistant layer comprises a binder and a plurality of inorganic particles, wherein the heat-resistant layer is disposed on the surface of the porous substrate in the range of 10% to 90% of the total surface area of the porous substrate.Type: ApplicationFiled: January 28, 2021Publication date: September 23, 2021Inventors: WEI-TING YEH, YI-FANG HUANG, KAI-WEI CHENG, YU-RUEI LI, WAN-TING LO
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Publication number: 20210175483Abstract: The present disclosure relates to a ceramic separator. The ceramic separator comprises a porous polyolefin substrate and a ceramic layer on the at least one surface of the porous polyolefin substrate. The ceramic layer comprises polydopamine-surface-decorated inorganic particles and a water-based binder. In addition to the necessary physical properties of common separators, the ceramic separator has excellent wettability and rate of absorption so as to improve the capacity and stability of batteries at a high battery discharge rate.Type: ApplicationFiled: May 5, 2020Publication date: June 10, 2021Inventors: Kai-Wei CHENG, Mei-Sia LYU, Wei-Ting YEH
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Patent number: 9425451Abstract: The present disclosure provides a separator for lithium battery, particularly to a separator including a middle layer formed by a punch method. Also, a manufacturing method of the separator is provided. The separator formed by the punch method has a better heat-resistant property in an elevated temperature and features a high mechanical strength.Type: GrantFiled: February 13, 2014Date of Patent: August 23, 2016Assignee: BenQ Materials CorporationInventors: Wei-Ting Yeh, Kang-Ming Peng
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Patent number: 9111687Abstract: An electrolyte composition for a dye-sensitized solar cell (DSSC) is provided, which includes a redox couple solution and inorganic nanoparticles. The surface of the inorganic nanoparticle may have a substituted or unsubstituted silane group, an ether group, a substituted amino group, a carbonyl group, an ester group, an amide group or a combination thereof.Type: GrantFiled: May 13, 2013Date of Patent: August 18, 2015Assignee: Eternal Materials Co., Ltd.Inventors: Wei-Ting Yeh, An-I Tsai
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Publication number: 20140356688Abstract: The present disclosure provides a separator for lithium battery, particularly to a separator including a middle layer formed by a punch method. Also, a manufacturing method of the separator is provided. The separator formed by the punch method has a better heat-resistant property in an elevated temperature and features a high mechanical strength.Type: ApplicationFiled: February 13, 2014Publication date: December 4, 2014Applicant: BenQ Materials CorporationInventors: Wei-Ting YEH, Kang-Ming PENG
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Patent number: D933411Type: GrantFiled: November 14, 2019Date of Patent: October 19, 2021Assignee: WISTRON CORP.Inventors: Wei-Kuo Lee, Ti-Shiang Liang, Wei-Ting Yeh