Patents by Inventor WEI V. TANG

WEI V. TANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210086239
    Abstract: Substrate supports, substrate support assemblies and methods of using an arc generated between a first electrode and a second electrode to clean a support surface. The first electrode comprises a plurality of first branches which are interdigitated with a plurality of branches of the second electrode in a finger-joint like pattern creating a gap between the first electrode and the second electrode.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 25, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Tejas Ulavi, Arkaprava Dan, Sanjeev Baluja, Wei V. Tang
  • Publication number: 20200411373
    Abstract: Methods of forming semiconductor device with fluorine-incorporated metal nitride films are described. A substrate surface is exposed to a metal fluoride precursor to form a metal-fluorine species on the substrate surface. The substrate surface is exposed to a nitriding agent to react with the metal-fluorine species to form a fluorine-incorporated metal nitride film.
    Type: Application
    Filed: June 28, 2020
    Publication date: December 31, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Yixiong Yang, Srinivas Gandikota, Steven C.H. Hung, Jacqueline S. Wrench, Yongjing Lin, Susmit Singha Roy, Wei V. Tang, Shih Chung Chen
  • Publication number: 20200381295
    Abstract: Process chamber lid assemblies and process chambers comprising same are described. The lid assembly has a housing with a gas dispersion channel in fluid communication with a lid plate. A contoured bottom surface of the lid plate defines a gap to a top surface of a gas distribution plate. A pumping channel is formed between an upper outer peripheral contour of the gas distribution plate and the lid plate.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 3, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Anqing Cui, Dien-Yeh Wu, Wei V. Tang, Yixiong Yang, Bo Wang
  • Publication number: 20200373318
    Abstract: Methods of forming memory structures are discussed. Specifically, methods of forming 3D NAND devices are discussed. Some embodiments form memory structures with a metal nitride barrier layer, an ?-tungsten layer, and a bulk metal material. The barrier layer comprises a TiXN or TaXN material, where X comprises a metal selected from one or more of aluminum (Al), silicon (Si), tungsten (W), lanthanum (La), yttrium (Yt), strontium (Sr), or magnesium (Mg).
    Type: Application
    Filed: May 18, 2020
    Publication date: November 26, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Jacqueline S. Wrench, Yixiong Yang, Yong Wu, Wei V. Tang, Srinivas Gandikota, Yongjing Lin, Karla M. Barnal Ramos, Shih Chung Chen
  • Patent number: 10755947
    Abstract: Processing methods comprising etching a metal nitride layer with an etchant. The etchant can be, for example, WCl5, WOCl4 or TaCl5. Methods of improving the selectivity of etch processes are also disclosed.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: August 25, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Wenyu Zhang, Yixiong Yang, Mario D. Sanchez, Guoqiang Jian, Wei V. Tang, Paul F. Ma
  • Publication number: 20200243341
    Abstract: In-situ methods for depositing a metal film without the use of a barrier layer are disclosed. Some embodiments comprise forming an amorphous nucleation layer comprising one or more of silicon or boron and forming a metal layer on the nucleation layer. These processes are performed without an air break between processes.
    Type: Application
    Filed: March 30, 2020
    Publication date: July 30, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Yong Wu, Wei V. Tang, Jianqiu Guo, Wenyi Liu, Yixiong Yang, Jacqueline S. Wrench, Mandyam Sriram, Srinivas Gandikota, Yumin He
  • Patent number: 10665450
    Abstract: Methods and apparatus for forming a semiconductor structure, including depositing a doping stack having a first surface atop a high-k dielectric layer, wherein the doping stack includes at least one first metal layer having a first surface, at least one second metal layer comprising a first aluminum dopant and a first surface, wherein the second metal layer is atop the first surface of the first metal layer, and at least one third metal layer atop the first surface of the second metal layer; depositing an anneal layer atop the first surface of the doping stack; annealing the structure to diffuse at least the first aluminum dopant into the high-k dielectric layer; removing the anneal layer; and depositing at least one work function layer atop the first surface of the doping stack.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: May 26, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yixiong Yang, Paul F. Ma, Wei V. Tang, Wenyu Zhang, Shih Chung Chen, Chen Han Lin, Chi-Chou Lin, Yi Xu, Yu Lei, Naomi Yoshida, Lin Dong, Siddarth Krishnan
  • Publication number: 20200063263
    Abstract: Methods of depositing platinum group metal films of high purity, low resistivity, and good conformality are described. A platinum group metal film is formed in the absence of an oxidant. The platinum group metal film is selectively deposited on a conductive substrate at a temperature less than 200° C. by using an organic platinum group metal precursor.
    Type: Application
    Filed: August 23, 2019
    Publication date: February 27, 2020
    Inventors: Yixiong Yang, Wei V. Tang, Seshadri Ganguli, Sang Ho Yu, Feng Q. Liu, Jeffrey W. Anthis, David Thompson, Jacqueline S. Wrench, Naomi Yoshida
  • Patent number: 10407771
    Abstract: Methods and apparatus for cleaning an atomic layer deposition chamber are provided herein. In some embodiments, a chamber lid assembly includes: a housing enclosing a central channel that extends along a central axis and has an upper portion and a lower portion; a lid plate coupled to the housing and having a contoured bottom surface that extends downwardly and outwardly from a central opening coupled to the lower portion of the central channel to a peripheral portion of the lid plate; a first heating element to heat the central channel; a second heating element to heat the bottom surface of the lid plate; a remote plasma source fluidly coupled to the central channel; and an isolation collar coupled between the remote plasma source and the housing, wherein the isolation collar has an inner channel extending through the isolation collar to fluidly couple the remote plasma source and the central channel.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: September 10, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Anqing Cui, Faruk Gungor, Dien-Yeh Wu, Vikas Jangra, Muhammad M. Rasheed, Wei V. Tang, Yixiong Yang, Xiaoxiong Yuan, Kyoung-Ho Bu, Srinivas Gandikota, Yu Chang, William W. Kuang
  • Publication number: 20190057863
    Abstract: Methods and apparatus for forming a semiconductor structure, including depositing a doping stack having a first surface atop a high-k dielectric layer, wherein the doping stack includes at least one first metal layer having a first surface, at least one second metal layer comprising a first aluminum dopant and a first surface, wherein the second metal layer is atop the first surface of the first metal layer, and at least one third metal layer atop the first surface of the second metal layer; depositing an anneal layer atop the first surface of the doping stack; annealing the structure to diffuse at least the first aluminum dopant into the high-k dielectric layer; removing the anneal layer; and depositing at least one work function layer atop the first surface of the doping stack.
    Type: Application
    Filed: August 17, 2018
    Publication date: February 21, 2019
    Inventors: YIXIONG YANG, PAUL F. MA, WEI V. TANG, WENYU ZHANG, SHIH CHUNG CHEN, CHEN HAN LIN, CHI-CHOU LIN, YI XU, YU LEI, NAOMI YOSHIDA, LIN DONG, SIDDARTH KRISHNAN
  • Patent number: 10170321
    Abstract: Described are methods of depositing a titanium aluminum nitride film on a substrate surface with a controlled amount of carbon. The methods include exposing a substrate surface to a titanium precursor, a nitrogen reactant and an aluminum precursor with purges of the unreacted titanium and aluminum precursors and unreacted nitrogen reactants between each exposure.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: January 1, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Wenyu Zhang, Wei V. Tang, Yixiong Yang, Chen-Han Lin, Yi Xu, Yu Lei, Naomi Yoshida, Lin Dong, Drew Phillips, Srividya Natarajan, Atashi Basu, Kaliappan Muthukumar, David Thompson, Paul F. Ma
  • Publication number: 20180269065
    Abstract: Described are methods of depositing a titanium aluminum nitride film on a substrate surface with a controlled amount of carbon. The methods include exposing a substrate surface to a titanium precursor, a nitrogen reactant and an aluminum precursor with purges of the unreacted titanium and aluminum precursors and unreacted nitrogen reactants between each exposure.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 20, 2018
    Inventors: Wenyu Zhang, Wei V. Tang, Yixiong Yang, Chen-Han Lin, Yi Xu, Yu Lei, Naomi Yoshida, Lin Dong, Drew Phillips, Srividya Natarajan, Atashi Basu, Kaliappan Muthukumar, David Thompson, Paul F. Ma
  • Patent number: 10014185
    Abstract: Processing methods comprising oxidizing a metal nitride film to form a metal oxynitride layer and etching the metal oxynitride layer with a metal halide etchant. The metal halide etchant can be, for example, WCl5, WOCl4 or TaCl5. Methods of filling a trench with a seam-free gapfill are also described. A metal nitride film is deposited in the trench to form a seam and pinch-off an opening of the trench. The pinched-off opening is subjected to a directional oxidizing plasma and a metal halide etchant to open the pinched-off top and allow access to the seam.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: July 3, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Liqi Wu, Wenyu Zhang, Shih Chung Chen, Wei V. Tang, Leung Kway Lee, Xinming Zhang, Paul F. Ma
  • Patent number: 9947578
    Abstract: Methods for forming metal contacts having tungsten liner layers are provided herein. In some embodiments, a method of processing a substrate includes: exposing a substrate, within a first substrate process chamber, to a plasma formed from a first gas comprising a metal organic tungsten precursor gas or a fluorine-free tungsten halide precursor to deposit a tungsten liner layer, wherein the tungsten liner layer is deposited atop a dielectric layer and within a feature formed in a first surface of the dielectric layer of a substrate; transferring the substrate to a second substrate process chamber without exposing the substrate to atmosphere; and exposing the substrate to a second gas comprising a tungsten fluoride precursor to deposit a tungsten fill layer atop the tungsten liner layer.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: April 17, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yu Lei, Vikash Banthia, Kai Wu, Xinyu Fu, Yi Xu, Kazuya Daito, Feiyue Ma, Pulkit Agarwal, Chi-Chou Lin, Dien-Yeh Wu, Guoqiang Jian, Wei V. Tang, Jonathan Bakke, Mei Chang, Sundar Ramamurthy
  • Patent number: 9748354
    Abstract: Semiconductor devices incorporating multi-threshold voltage structures and methods of forming such semiconductor devices are provided herein. In some embodiments of the present disclosure, a semiconductor device having a multi-threshold voltage structure includes: a substrate; a gate dielectric layer atop the substrate, wherein the gate dielectric layer comprises an interface layer and a high-k dielectric layer atop the interface layer; a lanthanum nitride layer deposited atop the high-k dielectric layer; an interface of the interface layer and the high-k dielectric layer comprising lanthanum species from the lanthanum nitride layer; and a gate electrode layer atop the lanthanum nitride layer.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: August 29, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Wei V. Tang, Paul F. Ma, Steven C. H. Hung, Michael Chudzik, Siddarth Krishnan, Wenyu Zhang, Seshadri Ganguli, Naomi Yoshida, Lin Dong, Yixiong Yang, Liqi Wu, Shih Chung Chen
  • Publication number: 20170179252
    Abstract: Semiconductor devices incorporating multi-threshold voltage structures and methods of forming such semiconductor devices are provided herein. In some embodiments of the present disclosure, a semiconductor device having a multi-threshold voltage structure includes: a substrate; a gate dielectric layer atop the substrate, wherein the gate dielectric layer comprises an interface layer and a high-k dielectric layer atop the interface layer; a lanthanum nitride layer deposited atop the high-k dielectric layer; an interface of the interface layer and the high-k dielectric layer comprising lanthanum species from the lanthanum nitride layer; and a gate electrode layer atop the lanthanum nitride layer.
    Type: Application
    Filed: February 15, 2016
    Publication date: June 22, 2017
    Inventors: Wei V. TANG, Paul F. MA, Steven C. H. HUNG, Michael CHUDZIK, Siddarth KRISHNAN, Wenyu ZHANG, Seshadri GANGULI, Naomi YOSHIDA, Lin DONG, Yixiong YANG, Liqi WU, Shih Chung CHEN
  • Publication number: 20170148670
    Abstract: Methods for forming metal contacts having tungsten liner layers are provided herein. In some embodiments, a method of processing a substrate includes: exposing a substrate, within a first substrate process chamber, to a plasma formed from a first gas comprising a metal organic tungsten precursor gas or a fluorine-free tungsten halide precursor to deposit a tungsten liner layer, wherein the tungsten liner layer is deposited atop a dielectric layer and within a feature formed in a first surface of the dielectric layer of a substrate; transferring the substrate to a second substrate process chamber without exposing the substrate to atmosphere; and exposing the substrate to a second gas comprising a tungsten fluoride precursor to deposit a tungsten fill layer atop the tungsten liner layer.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 25, 2017
    Inventors: YU LEI, VIKASH BANTHIA, KAI WU, XINYU FU, YI XU, KAZUYA DAITO, FEIYUE MA, PULKIT AGARWAL, CHI-CHOU LIN, DIEN-YEH WU, GUOQIANG JIAN, WEI V. TANG, JONATHAN BAKKE, MEI CHANG, SUNDAR RAMAMURTHY
  • Publication number: 20160097119
    Abstract: Methods and apparatus for cleaning an atomic layer deposition chamber are provided herein. In some embodiments, a chamber lid assembly includes: a housing enclosing a central channel that extends along a central axis and has an upper portion and a lower portion; a lid plate coupled to the housing and having a contoured bottom surface that extends downwardly and outwardly from a central opening coupled to the lower portion of the central channel to a peripheral portion of the lid plate; a first heating element to heat the central channel; a second heating element to heat the bottom surface of the lid plate; a remote plasma source fluidly coupled to the central channel; and an isolation collar coupled between the remote plasma source and the housing, wherein the isolation collar has an inner channel extending through the isolation collar to fluidly couple the remote plasma source and the central channel.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 7, 2016
    Inventors: ANQING CUI, FARUK GUNGOR, DIEN-YEH WU, VIKAS JANGRA, MUHAMMAD M. RASHEED, WEI V. TANG, YIXIONG YANG, XIAOXIONG YUAN, KYOUNG-HO BU, SRINIVAS GANDIKOTA, YU CHANG, WILLIAM W. KUANG