Patents by Inventor Wei-Wen Tsai

Wei-Wen Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10841441
    Abstract: A scanning device includes an outer shell, a glass platform, a contact image sensor, a paper feeding unit and an upper cover. An inside of the outer shell has an accommodating space. The glass platform is disposed to the outer shell. The glass platform includes an automatic paper fed and scanned area, and a static paper scan area. The contact image sensor is disposed in the accommodating space. The paper feeding unit is disposed to a top surface of the automatic paper fed and scanned area. The upper cover is pivotally disposed to a top surface of the static paper scan area. A top surface of the upper cover is recessed downward to form a paper loading groove.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: November 17, 2020
    Assignee: Foxlink Image Technology Co., Ltd.
    Inventors: Chi Wen Chen, Wei Xiang Tsai, Hsing Hung Lee, Yi Hsuan Lin
  • Publication number: 20200355199
    Abstract: A fan module including a body and a plurality of blades is provided. The body has a rotating axis and the body is telescopic along the rotating axis to have an elongated state and a shortened state. The blades are respectively disposed on the body and rotate along with the body along the rotating axis. At least a portion of each blade is flexible and a bending state of each blade is changed along with the elongated state or the shortened state of the body. An axial size of each blade along the rotating axis when the body is in the elongated state is greater than the axial size of each blade along the rotating axis when the body is in the shortened state.
    Type: Application
    Filed: March 27, 2020
    Publication date: November 12, 2020
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Han-Hsuan Tsai, Jui-Min Huang, Wei-Hao Lan, Chien-Chu Chen, Ching-Ya Tu, Chih-Wen Chiang, Ching-Tai Chang, Ken-Ping Lin, Yao-Lin Chang, Cheng-Ya Chi
  • Publication number: 20200350404
    Abstract: Embodiments of mechanisms for forming dislocations in source and drain regions of finFET devices are provided. The mechanisms involve recessing fins and removing the dielectric material in the isolation structures neighboring fins to increase epitaxial regions for dislocation formation. The mechanisms also involve performing a pre-amorphous implantation (PAI) process either before or after the epitaxial growth in the recessed source and drain regions. An anneal process after the PAI process enables consistent growth of the dislocations in the source and drain regions. The dislocations in the source and drain regions (or stressor regions) can form consistently to produce targeted strain in the source and drain regions to improve carrier mobility and device performance for NMOS devices.
    Type: Application
    Filed: July 20, 2020
    Publication date: November 5, 2020
    Inventors: Chun Hsiung Tsai, Wei-Yuan Lu, Chien-Tai Chan, Wei-Yang Lee, Da-Wen Lin
  • Publication number: 20200348339
    Abstract: Disclosed are a supplementary bushing, a test probe, and a supplementary testing device. The supplementary bushing has a closed end, an open end, a receiving groove, and at least one first fixing portion. The closed end has a first contact, and the receiving groove is concavely formed from an open end towards the closed end. The first fixing portion is disposed on an inner surface of the receiving groove. The test probe is installed in the receiving hole of a base of the supplementary testing device and has a testing end and a connecting end. The testing end has a second contact, a second fixing portion and a stop portion.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Inventors: MING-DAO WU, SHIH-HUNG LO, HAO-WEN CHIEN, FU-CHENG CHUANG, WEI-CHU CHEN, KUO-WEI CHANG, BOR-CHEN TSAI, CHIH-FENG CHEN
  • Publication number: 20200343385
    Abstract: A memory structure includes a substrate, a gate electrode, a first isolation layer, a thin metal layer, indium gallium zinc oxide (IGZO) particles, a second isolation layer, an IGZO channel layer, and a source/drain electrode. The gate electrode is located on the substrate. The first isolation layer is located on the gate electrode. The thin metal layer is located on the first isolation layer, and has metal particles. The IGZO particles are located on the metal particles. The second isolation layer is located on the IGZO particles. The IGZO channel layer is located on the second isolation layer. The source/drain electrode is located on the IGZO channel layer.
    Type: Application
    Filed: April 12, 2020
    Publication date: October 29, 2020
    Inventors: Hsiao-Wen ZAN, Chuang-Chuang TSAI, Ching-Fu LIN, Zong-Xuan LI, Wei-Tsung CHEN
  • Publication number: 20200343135
    Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.
    Type: Application
    Filed: April 23, 2019
    Publication date: October 29, 2020
    Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 10815392
    Abstract: A process for chemical mechanical polishing a substrate containing tungsten is disclosed to reduce corrosion rate and inhibit dishing of the tungsten and erosion of underlying dielectrics. The process includes providing a substrate; providing a polishing composition, containing, as initial components: water; an oxidizing agent; nonionic polyacrylamide; a dicarboxylic acid, a source of iron ions; a colloidal silica abrasive having a negative zeta potential; and, optionally, a pH adjusting agent; providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the polishing composition onto the polishing surface at or near the interface between the polishing pad and the substrate; wherein some of the tungsten is polished away from the substrate, corrosion rate is reduced, dishing of the tungsten is inhibited as well as erosion of dielectrics underlying the tungsten.
    Type: Grant
    Filed: March 3, 2019
    Date of Patent: October 27, 2020
    Assignee: ROHM AND HAAS ELECTRONIC CMP HOLDINGS, INC.
    Inventors: Lin-Chen Ho, Wei-Wen Tsai
  • Publication number: 20200321252
    Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Chung-Chiang Wu, Wei-Chin Lee, Shih-Hang Chiu, Chia-Ching Lee, Hsueh Wen Tsau, Cheng-Yen Tsai, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
  • Publication number: 20200309138
    Abstract: A fan module including a first body, a second body, a first fan assembly, a power module, and a second fan assembly is provided. The second body is slidably disposed at the first body to form a circulation space together. The first fan assembly is rotatably disposed at the first body and has sliding grooves. The power module is disposed in the first body and connected to the first fan assembly. The second fan assembly is rotatably disposed at the second body and has sliding portions, respectively and slidably disposed in corresponding sliding grooves. The power module is adapted to drive the first and second fan assemblies to rotate relative to the first body. A link module is adapted to drive the first and second bodies to relatively slide along an axial direction, so that the first and second fan assemblies are relatively separated or overlapped along the axial direction.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 1, 2020
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Han-Hsuan Tsai, Jui-Min Huang, Wei-Hao Lan, Chien-Chu Chen, Ching-Ya Tu, Chih-Wen Chiang, Ching-Tai Chang, Ken-Ping Lin, Yao-Lin Chang, Cheng-Ya Chi
  • Publication number: 20200300976
    Abstract: A proximity sensor includes a substrate, a light source, a finger electrode, an active layer, and a transparent electrode layer. The substrate has opposite top and bottom surfaces. The light source faces toward the bottom surface of the substrate. The finger electrode is located on the top surface of the substrate, and has finger portions and gaps between every two adjacent finger portions. The active layer covers the finger electrode, and is located in the gaps. The transparent electrode layer is located on the active layer. When the light source emits light, the light through the gaps sequentially passes through the active layer and the transparent electrode layer onto a reflective surface. The light is reflected by the reflective surface to form reflected light, and the reflected light passes through the transparent electrode layer and is received by the active layer.
    Type: Application
    Filed: March 19, 2020
    Publication date: September 24, 2020
    Inventors: Hsiao-Wen ZAN, Chuang-Chuang TSAI, Ching-Fu LIN, Chao-Hsuan CHEN, Zong-Xuan LI, Wei-Tsung CHEN
  • Publication number: 20200303785
    Abstract: A battery module for use in a battery system is operable in a bottom mode, a top mode or a middle mode during an enabled state. The battery module includes a battery unit and a battery control circuit. The battery unit which includes at least one battery generates a battery unit voltage between a positive terminal and a negative terminal of the battery unit. The battery control circuit is powered by the battery unit voltage and is configured to control the battery unit. The battery control circuit includes an enable terminal, an upstream input terminal, an upstream output terminal, a downstream input terminal, and a downstream output terminal. When the enable terminal is at an operation enabling level, or when the upstream input terminal is at an upstream enabling level, the battery module enters the enabled state.
    Type: Application
    Filed: February 4, 2020
    Publication date: September 24, 2020
    Inventors: Wei-Hsu Chang, Hao-Wen Chung, Chung-Hui Yeh, Kuo-Chen Tsai
  • Publication number: 20200255690
    Abstract: A process and composition are disclosed for polishing tungsten containing select quaternary phosphonium compounds at low concentrations to at least reduce corrosion rate of tungsten. The process and composition include providing a substrate containing tungsten; providing a stable polishing composition, containing, as initial components: water; an oxidizing agent; select quaternary phosphonium compounds at low concentrations to at least reduce corrosion rate; a dicarboxylic acid, a source of iron ions; a colloidal silica abrasive; and, optionally a pH adjusting agent; providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the polishing composition onto the polishing surface at or near the interface between the polishing pad and the substrate; wherein some of the tungsten is polished away from the substrate, and corrosion rate of tungsten is reduced.
    Type: Application
    Filed: February 21, 2020
    Publication date: August 13, 2020
    Inventors: Lin-Chen Ho, Wei-Wen Tsai, Cheng-Ping Lee
  • Patent number: 10741642
    Abstract: Embodiments of mechanisms for forming dislocations in source and drain regions of finFET devices are provided. The mechanisms involve recessing fins and removing the dielectric material in the isolation structures neighboring fins to increase epitaxial regions for dislocation formation. The mechanisms also involve performing a pre-amorphous implantation (PAI) process either before or after the epitaxial growth in the recessed source and drain regions. An anneal process after the PAI process enables consistent growth of the dislocations in the source and drain regions. The dislocations in the source and drain regions (or stressor regions) can form consistently to produce targeted strain in the source and drain regions to improve carrier mobility and device performance for NMOS devices.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: August 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun Hsiung Tsai, Wei-Yuan Lu, Chien-Tai Chan, Wei-Yang Lee, Da-Wen Lin
  • Patent number: 10692770
    Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Wei-Chin Lee, Shih-Hang Chiu, Chia-Ching Lee, Hsueh Wen Tsau, Cheng-Yen Tsai, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
  • Patent number: 10679357
    Abstract: An image-based object tracking system including a photographic device and a computing equipment is provided. The photographic device captures a first image of a scene at a first time and a second image of the scene at a second time subsequent to the first time. The computing equipment determines an area of the scene in the first and second images, which includes a midline of the scene in the first and second images, overlaps the first and second images for determining whether a distance between a first object in the first image and a second object in the second image is less than a predetermined threshold in response to the first object being in the area and the second object not being in the area, and updates an entry object count or an exit object count in response to the distance being less than the predetermined threshold.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: June 9, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chen-Chung Lee, Chia-Hung Lin, Ming-Jen Chen, Ching-Wen Lin, Wei-Lun Tsai, Jui-Sen Tuan, You-Dian Lin
  • Publication number: 20200169642
    Abstract: A scanning device includes an outer shell, a glass platform, a contact image sensor, a paper feeding unit and an upper cover. An inside of the outer shell has an accommodating space. The glass platform is disposed to the outer shell. The glass platform includes an automatic paper fed and scanned area, and a static paper scan area. The contact image sensor is disposed in the accommodating space. The paper feeding unit is disposed to a top surface of the automatic paper fed and scanned area. The upper cover is pivotally disposed to a top surface of the static paper scan area. A top surface of the upper cover is recessed downward to form a paper loading groove.
    Type: Application
    Filed: October 30, 2019
    Publication date: May 28, 2020
    Inventors: Chi Wen Chen, Wei Xiang Tsai, Hsing Hung Lee, Yi Hsuan Lin
  • Patent number: 10654150
    Abstract: A grinding disk and a method of manufacturing the same are provided. The grinding disk includes a graphite base and a silicon carbide film, the silicon carbide film covering the graphite base, and the silicon carbide film has a surface grain size of 5 ?m to 80 ?m. By a hot-wall chemical vapor deposition system, a highly dense silicon carbide film is formed on a surface of the graphite base. The grinding disk may replace a conventional metallographic grinding and polishing disk, and is improved in characteristics such as hydrophobicity and abrasion resistance.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: May 19, 2020
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Chien Tsai, Hao-Wen Cheng, Jin-Bao Wu, Ming-Sheng Leu
  • Patent number: 10653735
    Abstract: Use of Mesembryanthemum crystallinum L. callus extract in the manufacture of a medicament or a skin care product, wherein the medicament or skin care product is for at least one of delaying skin cell aging, nursing skin, repairing skin, treating skin cancer, and preventing skin cancer.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: May 19, 2020
    Assignee: TCI CO., LTD.
    Inventors: Yung-Hsiang Lin, Wei-Wen Kuo, I-Hui Chen, Yi-Chun Chen, Hui-Hsin Shih, Yun-Ching Tsai
  • Patent number: 10640682
    Abstract: A process for chemical mechanical polishing a substrate containing tungsten is disclosed to reduce static corrosion rate and inhibit dishing of the tungsten and erosion of underlying dielectrics. The process includes providing a substrate; providing a polishing composition, containing, as initial components: water; an oxidizing agent; guar gum; a dicarboxylic acid, a source of iron ions; a colloidal silica abrasive; and, optionally a pH adjusting agent; providing a chemical mechanical polishing pad, having a polishing surface; creating dynamic contact at an interface between the polishing pad and the substrate; and dispensing the polishing composition onto the polishing surface at or near the interface between the polishing pad and the substrate; wherein some of the tungsten (W) is polished away from the substrate, static corrosion rate is reduced, dishing of the tungsten (W) is inhibited as well as erosion of dielectrics underlying the tungsten (W).
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: May 5, 2020
    Assignee: Rohm and Haas Electronics Materials CMP Holdings, Inc.
    Inventors: Wei-Wen Tsai, Lin-Chen Ho, Cheng-Ping Lee
  • Publication number: 20200133117
    Abstract: A method and a system of performing layout enhancement include: providing a first design layout comprising a plurality of cells; updating a first cell in the plurality of cells using optical proximity correction to provide a first updated cell and a data set; updating a second cell from remaining cells in the first design layout based on the data set to provide a second updated cell; and manufacturing a mask based on the first updated cell and the second updated cell in the first design layout.
    Type: Application
    Filed: August 12, 2019
    Publication date: April 30, 2020
    Inventors: WEI-LIN CHU, HSIN-LUN TSENG, SHENG-WEN HUANG, CHIH-CHUNG HUANG, CHI-MING TSAI