Patents by Inventor Wei-Yang Ou

Wei-Yang Ou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6753800
    Abstract: A method for selecting capacitors in a charge redistribution digital-to-analog converter. m capacitors are arranged in the charge redistribution digital-to-analog converter. First, a signal is input to the charge redistribution digital-to-analog converter to identify n output units of the charge redistribution digital-to-analog converter. Then, the initial capacitor at the initial address and the following n−2 capacitors at the following n−2 addresses are continuously selected and if the following n−2 capacitors comprise the blank capacitor, the next capacitor is selected instead of the blank capacitor and a new blank capacitor is identified. Next, the initial address is changed to the address of the capacitor next to the last selected capacitor. Finally, the n−1 selected capacitors are output for the output units of the charge redistribution digital-to-analog converter. The n and m are positive integers and m>n>=1.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: June 22, 2004
    Assignee: Industrial Technology Research Institute
    Inventor: Wei-Yang Ou
  • Publication number: 20040058661
    Abstract: A receiving method for dual-mode receiver. When a received communication signal is a wideband signal, the dual-mode receiver is configured as a direct-conversion receiver, and when a received communication signal is a narrowband signal, the dual-mode receiver is configured as a low-IF receiver.
    Type: Application
    Filed: August 27, 2003
    Publication date: March 25, 2004
    Inventors: Chun-Ming Hsu, Wei-Yang Ou, Chih-Hong Lou, Tzu-Yi Yang
  • Publication number: 20030218917
    Abstract: A method for selecting capacitors in a charge redistribution digital-to-analog converter. m capacitors are arranged in the charge redistribution digital-to-analog converter. First, a signal is input to the charge redistribution digital-to-analog converter to identify n output units of the charge redistribution digital-to-analog converter. Then, the initial capacitor at the initial address and the following n−2 capacitors at the following n−2 addresses are continuously selected and if the following n−2 capacitors comprise the blank capacitor, the next capacitor is selected instead of the blank capacitor and a new blank capacitor is identified. Next, the initial address is changed to the address of the capacitor next to the last selected capacitor. Finally, the n−1 selected capacitors are output for the output units of the charge redistribution digital-to-analog converter. The n and m are positive integers and m>n>=1.
    Type: Application
    Filed: December 30, 2002
    Publication date: November 27, 2003
    Inventor: Wei-Yang Ou