Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.

Abstract: A blood pressure device includes a first blood pressure measuring device, a second blood pressure measuring device, and a controller. The first blood pressure measuring device is to be worn on a first position of a wrist so as to obtain a first blood pressure information of the first position. The second blood pressure measuring device is to be worn on a second position of the wrist so as to obtain a second blood pressure information of the second position. The controller is electrically coupled to the first blood pressure measuring device and the second blood pressure measuring device so as to adjust tightness between the expanders and the user's skin, respectively. The controller receives, processes, and calculates a pulse transit time between the first blood pressure information and the second blood pressure information, and the controller obtains at least one blood pressure value based on the pulse transit time.

Abstract: An optical proximity correction (OPC) device and method is provided. The OPC device includes an analysis unit, a reverse pattern addition unit, a first OPC unit, a second OPC unit and an output unit. The analysis unit is configured to analyze a defect pattern from a photomask layout. The reverse pattern addition unit is configured to provide a reverse pattern within the defect pattern. The first OPC unit is configured to perform a first OPC procedure on whole of the photomask layout. The second OPC unit is configured to perform a second OPC procedure on the defect pattern of the photomask layout to enhance an exposure tolerance window. The output unit is configured to output the photomask layout which is corrected.

Abstract: A method is provided for testing and for preventing over-erasure of unused redundant memory cells that can be subsequently used to replace defective memory cells in a Flash memory. An unused redundant memory cell is preprogrammed and tested simultaneously with each group of n memory cells. The selected unused redundant memory cell is preprogrammed only a couple of times and then skipped for the rest of the preprogramming pulses applied to the regular core cells. Each unused redundant memory cells is selected g times, where g is the ratio between the number of regular core cells and the number of redundant core cells in a row. As soon as an unused redundant memory cell is successfully preprogrammed, further preprogramming of that unused redundant memory cell is stopped until all regular cells in the group are preprogrammed. An unused redundant memory cell remains available as a replacement cell until chip testing is completed.

Abstract: A method is provided for testing and for preventing over-erasure of unused redundant memory cells that can be subsequently used to replace defective memory cells in a Flash memory. An unused redundant memory cell is preprogrammed and tested simultaneously with each group of n memory cells. The selected unused redundant memory cell is preprogrammed only a couple of times and then skipped for the rest of the preprogramming pulses applied to the regular core cells. Each unused redundant memory cells is selected g times, where g is the ratio between the number of regular core cells and the number of redundant core cells in a row. As soon as an unused redundant memory cell is successfully preprogrammed, further preprogramming of that unused redundant memory cell is stopped until all regular cells in the group are preprogrammed. An unused redundant memory cell remains available as a replacement cell until chip testing is completed.