Patents by Inventor Wei Yen

Wei Yen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10116335
    Abstract: A data processing method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving first write data; performing a first stage encoding operation of a low-density parity-check (LDPC) code on the first write data and generating first transition data; performing a second stage encoding operation of the LDPC code on the first transition data and generating a first error correcting code (ECC); receiving second write data; and performing the first stage encoding operation of the LDPC code on the second write data during a time period of performing the second stage encoding operation of the LDPC code on the first transition data. Accordingly, the data processing efficiency corresponding to the LDPC code can be improved.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: October 30, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yu-Hsiang Lin, Cheng-Che Yang, Shao-Wei Yen, Kuo-Hsin Lai
  • Patent number: 10108490
    Abstract: A decoding method, a memory storage device and a memory control circuit unit. The method includes: reading a plurality of bits from a plurality of first memory cells; performing a first decoding operation on the bits according to first reliability information; and performing a second decoding operation on the bits according to second reliability information if the first decoding operation fails and meets a default condition, and the second reliability information is different from the first reliability information, and a correction ability of the second reliability information for a first type error of the bits is higher than a correction ability of the first reliability information for the first type error. In addition, the first type error is generated by performing a specific programming operation on the first memory cells based on error data.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: October 23, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Yu-Hsiang Lin, Shao-Wei Yen, Cheng-Che Yang, Kuo-Hsin Lai
  • Patent number: 10103045
    Abstract: A vertical fixing transmission box used for transmitting a container is disclosed. The transmission box includes a carrier substrate and an elastic component, wherein the carrier substrate is utilized to carry the container, and the elastic component may be switched between an opening state and a fixing state. When the container is carried by the carrier substrate and the elastic component is switched to the opening state, the elastic component provides a vertical elastic force to abut against the container downwardly and fix the container. Also, the transmission box may be transported by an automatic material handling system.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: October 16, 2018
    Assignee: GUDENG PRECISION INDUSTRIAL CO., LTD.
    Inventors: Kuan-Chun Liu, Wei-Yen Chen, Chia-Ho Chuang, Ming-Chien Chiu
  • Publication number: 20180293131
    Abstract: A decoding method, a memory storage device and a memory control circuit unit. The method includes: reading a plurality of bits from a plurality of first memory cells; performing a first decoding operation on the bits according to first reliability information; and performing a second decoding operation on the bits according to second reliability information if the first decoding operation fails and meets a default condition, and the second reliability information is different from the first reliability information, and a correction ability of the second reliability information for a first type error of the bits is higher than a correction ability of the first reliability information for the first type error. In addition, the first type error is generated by performing a specific programming operation on the first memory cells based on error data.
    Type: Application
    Filed: May 25, 2017
    Publication date: October 11, 2018
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Yu-Hsiang Lin, Shao-Wei Yen, Cheng-Che Yang, Kuo-Hsin Lai
  • Publication number: 20180254900
    Abstract: A technique for maintaining encrypted content received over a network in a secure processor without exposing a key used to decrypt the content in the clear is disclosed.
    Type: Application
    Filed: May 7, 2018
    Publication date: September 6, 2018
    Inventors: John Princen, Pramila Srinivasan, David Blythe, Wei Yen
  • Patent number: 10067824
    Abstract: An error processing method for a rewritable non-volatile memory module, a memory storage device and a memory controlling circuit unit are provided. The rewritable non-volatile memory module includes a plurality of memory cells. The error processing method includes: sending a first read command sequence for reading a plurality of bits from the memory cells; performing a first decoding on the bits; determining whether each error belongs to a first type error or a second type error if the bits have at least one error; recording related information of a first error in the at least one error if the first error belongs to the first type error; and not recording the related information of the first error if the first error belongs to the second type error. Accordingly, errors with particular type may be processed suitably.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: September 4, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Wei Lin, Yu-Cheng Hsu, Shao-Wei Yen, Tien-Ching Wang, Yu-Hsiang Lin, Kuo-Hsin Lai, Li-Chun Liang
  • Patent number: 10043945
    Abstract: A method for fabricating a light emitting device, comprising: forming a plurality of light emitting stacked layers above a substrate; forming and patterning a current blocking (CB) layer on the light emitting stacked layers; forming a transparent conductive layer covering the light emitting stacked layers and the current blocking layer; etching the transparent conductive layer and exposing a reserved region for a first pad electrode and a mesa structure, respectively; and etching an exposed portion of the light emitting stacked layers and a portion of the current blocking layer to form a remaining current blocking layer, the mesa structure and a first opening.
    Type: Grant
    Filed: June 18, 2017
    Date of Patent: August 7, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Chien Cheng Huang, Kuo-Wei Yen, Yu-Wei Kuo, Yao-Wei Yang, Pei-Hsiang Tseng
  • Publication number: 20180206329
    Abstract: A high-frequency electronic device including a dielectric substrate, a first patterned metal layer and a second patterned metal layer is provided. The dielectric substrate has a first region and a second region. The first patterned metal layer is disposed on a first side of the dielectric substrate and corresponds to the first region, wherein the first region and the second region have different etching rates with respect to an etching solution. The second patterned metal layer is disposed on the first side or a second side opposite to the first side of the dielectric substrate.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 19, 2018
    Inventors: Yan-Syun WANG, Chi-Che TSAI, Wei-Yen WU, I-Yin LI
  • Patent number: 9985781
    Abstract: A technique for maintaining encrypted content received over a network in a secure processor without exposing a key used to decrypt the content in the clear is disclosed.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: May 29, 2018
    Assignee: Acer Cloud Technology, Inc.
    Inventors: John Princen, Pramila Srinivasan, David Blythe, Wei Yen
  • Publication number: 20180140873
    Abstract: Provided is a formulation for oral teeth, which includes a plurality of calcium ion carriers and a plurality of calcium-containing particulates. The particulates are carried by the calcium ion carriers, such that the formulation can prevent or rapidly treat dentin-associated symptoms or diseases, while providing a prolonged prophylactic or therapeutic effect.
    Type: Application
    Filed: January 11, 2018
    Publication date: May 24, 2018
    Inventors: Chun-Pin Lin, Hong-Ping Lin, Wei-Yen Yeh
  • Publication number: 20180102269
    Abstract: A vertical fixing transmission box used for transmitting a container is disclosed. The transmission box includes a carrier substrate and an elastic component, wherein the carrier substrate is utilized to carry the container, and the elastic component may be switched between an opening state and a fixing state. When the container is carried by the carrier substrate and the elastic component is switched to the opening state, the elastic component provides a vertical elastic force to abut against the container downwardly and fix the container. Also, the transmission box may be transport by an automatic material handling system.
    Type: Application
    Filed: December 20, 2016
    Publication date: April 12, 2018
    Inventors: Kuan-Chun LIU, Wei-Yen CHEN, Chia-Ho CHUANG, Ming-Chien CHIU
  • Publication number: 20180064757
    Abstract: Provided is a non-aqueous formulation for oral teeth, which includes a source of a metal ion and a source of a phosphate ion. The metal ion is chosen from alkaline earth metals, Zn, Zr or any combination thereof, and a molar ratio of the metal ion to the phosphate ion in the formulation is between about 0.01 and about 1.0. The non-aqueous formulation can provide a therapeutic effect.
    Type: Application
    Filed: September 8, 2016
    Publication date: March 8, 2018
    Inventors: Chun-Pin Lin, Hong-Ping Lin, Wei-Yen Yeh
  • Patent number: 9901755
    Abstract: Provided is a formulation for oral teeth, which includes a plurality of calcium ion carriers and a plurality of calcium-containing particulates. The particulates are carried by the calcium ion carriers, such that the formulation can prevent or rapidly treat dentin-associated symptoms or diseases, while providing a prolonged prophylactic or therapeutic effect.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 27, 2018
    Assignee: Sancastle Worldwide Corporation
    Inventors: Chun-Pin Lin, Hong-Ping Lin, Wei-Yen Yeh
  • Patent number: 9899214
    Abstract: The present disclosure provides a method for fabricating a vertical heterojunction of metal chalcogenides. The method includes steps of providing a multi-layer material, performing an ion implantation and performing an annealing. The multi-layer material has a carrier and a metal layer, in which the metal layer covers the carrier to form an interface. The carrier includes an oxide of a first metal element, and the metal layer includes a second metal element. The step of performing the ion implantation is to inject a chalcogen ion source into the multi-layer material to allow a plurality of chalcogen ions to be implanted in a depth area of the multi-layer material, and the depth area includes the interface. The step of performing the annealing is to form a first metal chalcogenide and a second metal chalcogenide at two sides of the interface, respectively.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: February 20, 2018
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Jenq-Horng Liang, Hsu-Sheng Tsai, Wei-Yen Woon
  • Publication number: 20180046542
    Abstract: In one exemplary embodiment, the decoding method includes: reading first data from a plurality of first memory cells of a rewritable non-volatile memory module; performing a first decoding operation on the first data based on a first decoding condition; and performing a second decoding operation on the first data based on a second decoding condition if the first decoding operation conforms to a first default status, where a strict level of locating an error bit in the first data based on the second decoding condition is higher than a strict level of locating the error bit in the first data based on the first decoding condition. Therefore, a decoding efficiency of a memory storage device can be improved.
    Type: Application
    Filed: October 21, 2016
    Publication date: February 15, 2018
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Yu-Hsiang Lin, Shao-Wei Yen, Cheng-Che Yang, Kuo-Hsin Lai
  • Patent number: 9832880
    Abstract: An electronic apparatus and a method for manufacturing the same are disclosed. The electronic device of the present invention comprises: a substrate with a first surface and a second surface; an electronic unit layer disposed on the first surface of the substrate; a residue layer disposed on the second surface of the substrate, wherein a material of the residue layer comprises: a compound containing at least one functional group selected from the group consisting of aryl, nitro and ketone.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: November 28, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Chi-Che Tsai, Yu-Yao Chen, Po-Yun Hsu, Wei-Yen Wu
  • Patent number: 9817306
    Abstract: The present invention relates to an EUV pod having marks, which comprises a mask pod and one or more mark disposed on the mask pod. One or more sensor of a processing machine is used for detecting the one or more mark. By including the one or more mark, the surface roughness of one or more region of the mask pod detectable by the one or more sensor can be altered. The one or more sensor emits light to the mask pod, which reflects the light to the one or more sensor. The one or more sensor receives the reflection light from the mask pod and judges if the voltage generated by the reflection light falls within the reflection ranges of the mark. Thereby, whether the one or more sensor corresponds to the one or more make can be confirmed.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: November 14, 2017
    Assignee: Gudeng Precision Industrial Co., Ltd.
    Inventors: Wei-Yen Chen, Cheng-Ju Lee, Long-Ming Lu, Cheng-Hsin Chen, Tien-Jui Lin
  • Publication number: 20170302299
    Abstract: A data processing method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving first write data; performing a first stage encoding operation of a low-density parity-check (LDPC) code on the first write data and generating first transition data; performing a second stage encoding operation of the LDPC code on the first transition data and generating a first error correcting code (ECC); receiving second write data; and performing the first stage encoding operation of the LDPC code on the second write data during a time period of performing the second stage encoding operation of the LDPC code on the first transition data. Accordingly, the data processing efficiency corresponding to the LDPC code can be improved.
    Type: Application
    Filed: June 22, 2016
    Publication date: October 19, 2017
    Inventors: Yu-Hsiang Lin, Cheng-Che Yang, Shao-Wei Yen, Kuo-Hsin Lai
  • Publication number: 20170294558
    Abstract: A method for fabricating a light emitting device, comprising: forming a plurality of light emitting stacked layers above a substrate; forming and patterning a current blocking (CB) layer on the light emitting stacked layers; forming a transparent conductive layer covering the light emitting stacked layers and the current blocking layer; etching the transparent conductive layer and exposing a reserved region for a first pad electrode and a mesa structure, respectively; and etching an exposed portion of the light emitting stacked layers and a portion of the current blocking layer to form a remaining current blocking layer, the mesa structure and a first opening.
    Type: Application
    Filed: June 18, 2017
    Publication date: October 12, 2017
    Inventors: CHIEN CHENG HUANG, KUO-WEI YEN, YU-WEI KUO, YAO-WEI YANG, PEI-HSIANG TSENG
  • Publication number: 20170294217
    Abstract: A decoding method, a memory storage device and a memory control circuit unit are provided. The method includes: reading data from a plurality of first memory cells of a rewritable non-volatile memory module; estimating an error bit occurrence rate of the data before performing a first decoding process on the data; and performing the first decoding process on the data by using a first decoding parameter according to the estimated error bit occurrence rate, wherein the first decoding parameter corresponds to a strict level for locating an error bit in the first decoding process. As a result, a decoding efficiency of the memory storage device can be improved.
    Type: Application
    Filed: June 1, 2016
    Publication date: October 12, 2017
    Inventors: Yu-Hsiang Lin, Shao-Wei Yen, Cheng-Che Yang, Kuo-Hsin Lai