Patents by Inventor Wei-Yu Lee

Wei-Yu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141123
    Abstract: A manufacturing method of a modified polymer layer modified by hydroxyapatite is provided in the present disclosure, including following steps: (a) providing a polymer layer; (b) plasma-activating acrylic acid using an atmospheric cold plasma device to modify a surface of the polymer layer to obtain an acrylic-modified polymer layer; (c) immersing the acrylic-modified polymer layer in a first solution containing a calcium ion to obtain a calcium-containing modified layer; and (d) immersing the calcium-containing modified layer in a second solution containing phosphate salt to obtain a modified polymer layer modified by hydroxyapatite.
    Type: Application
    Filed: June 9, 2023
    Publication date: May 2, 2024
    Inventors: Wei-Yu CHEN, Jui-Sheng LEE, Hui-Ju HSU
  • Publication number: 20240130714
    Abstract: Disclosed are computer-implemented or computer-aided method for diagnosing or predicting the risk of obstructive sleep apnea in a subject. The methods comprise determining whether the subject has obstructive sleep apnea based on at least one quantitative ultrasound parameter and/or at least one morphometric parameter.
    Type: Application
    Filed: May 16, 2023
    Publication date: April 25, 2024
    Applicant: AMCAD BIOMED CORPORATION
    Inventors: Argon CHEN, Yi-li LEE, Pei-Yu CHAO, Wei-Hao CHEN, Wei-Yu HSU
  • Publication number: 20240132496
    Abstract: An ionic compound, an absorbent and an absorption device are provided. The ionic compound has a structure represented by Formula (I): ABn, ??Formula (I) wherein A is B is R1, R2, R3, R4, R5, and R6 are independently H, C1-6 alkyl group; and n is 1 or 2.
    Type: Application
    Filed: June 9, 2023
    Publication date: April 25, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Wei-Chih LEE, Yi-Hsiang CHEN, Chih-Hao CHEN, Ai-Yu LIOU, Jyi-Ching PERNG, Jiun-Jen CHEN
  • Patent number: 11968856
    Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: April 23, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Chung-Chih Wu, Po-Jui Chen, Hoang Yan Lin, Guo-Dong Su, Wei-Kai Lee, Chi-Jui Chang, Wan-Yu Lin, Byung Sung Kwak, Robert Jan Visser
  • Patent number: 11956994
    Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Chung-Chih Wu, Hoang Yan Lin, Guo-Dong Su, Zih-Rou Cyue, Li-Yu Yu, Wei-Kai Lee, Guan-Yu Chen, Chung-Chia Chen, Wan-Yu Lin, Gang Yu, Byung-Sung Kwak, Robert Jan Visser, Chi-Jui Chang
  • Patent number: 11956919
    Abstract: A cold plate is provided and includes: a housing disposed with a chamber; a base combined with the housing to form a working space separated from the chamber but connected with the chamber through an interconnecting structure to allow a working medium to flow within the chamber and the working space; a heat transfer structure disposed on the inner side of the base; and a pump disposed within the working space to drive the working medium in the working space. As such, the cold plate can provide better heat dissipation performance.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: April 9, 2024
    Assignee: AURAS TECHNOLOGY CO., LTD.
    Inventors: Chien-An Chen, Chien-Yu Chen, Tian-Li Ye, Jen-Hao Lin, Wei-Shen Lee
  • Publication number: 20240113202
    Abstract: Embodiments of the present disclosure relate to a FinFET device having gate spacers with reduced capacitance and methods for forming the FinFET device. Particularly, the FinFET device according to the present disclosure includes gate spacers formed by two or more depositions. The gate spacers are formed by depositing first and second materials at different times of processing to reduce parasitic capacitance between gate structures and contacts introduced after epitaxy growth of source/drain regions.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Wen-Kai Lin, Bo-Yu Lai, Li Chun Te, Kai-Hsuan Lee, Sai-Hooi Yeong, Tien-I Bao, Wei-Ken Lin
  • Publication number: 20240113201
    Abstract: Methods and structures for modulating an inner spacer profile include providing a fin having an epitaxial layer stack including a plurality of semiconductor channel layers interposed by a plurality of dummy layers. In some embodiments, the method further includes removing the plurality of dummy layers to form a first gap between adjacent semiconductor channel layers of the plurality of semiconductor channel layers. Thereafter, in some examples, the method includes conformally depositing a dielectric layer to substantially fill the first gap between the adjacent semiconductor channel layers. In some cases, the method further includes etching exposed lateral surfaces of the dielectric layer to form an etched-back dielectric layer that defines substantially V-shaped recesses. In some embodiments, the method further includes forming a substantially V-shaped inner spacer within the substantially V-shaped recesses.
    Type: Application
    Filed: January 25, 2023
    Publication date: April 4, 2024
    Inventors: Chih-Ching WANG, Wei-Yang LEE, Bo-Yu LAI, Chung-I YANG, Sung-En LIN
  • Publication number: 20240111337
    Abstract: An electronic device including a body and a receptacle connector is provided. The body has a side wall surface, a receptacle slot located at the side wall surface, a waterproof protrusion protruding from the side wall surface, and two gutters located at the side wall surface, where the waterproof protrusion is located above the receptacle slot, and the two gutters are respectively located at two opposite sides of the receptacle slot. The receptacle connector is disposed in the receptacle slot.
    Type: Application
    Filed: May 8, 2023
    Publication date: April 4, 2024
    Applicant: Acer Incorporated
    Inventors: Wei-Chih Wang, Chen-Min Hsiu, Chien-Yu Lee, Szu-Wei Yang, Fang-Ying Huang
  • Publication number: 20240088155
    Abstract: A semiconductor device includes source/drain regions, a gate structure, a first gate spacer, and a dielectric material. The source/drain regions are over a substrate. The gate structure is laterally between the source/drain regions. The first gate spacer is on a first sidewall of the gate structure, and spaced apart from a first one of the source/drain regions at least in part by a void region. The dielectric material is between the first one of the source/drain regions and the void region. The dielectric material has a gradient ratio of a first chemical element to a second chemical element.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Bo-Yu LAI, Kai-Hsuan LEE, Wei-Yang LEE, Feng-Cheng YANG, Yen-Ming CHEN
  • Patent number: 11923409
    Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
  • Patent number: 11748629
    Abstract: A computing device for handling anomaly detection, comprises an encoder, for receiving an input image, to generate a first latent vector comprising a semantic latent vector and a visual appearance latent vector according to the input image and at least one first parameter of the encoder; and a training module, coupled to the encoder, for receiving the input image and the first latent vector, to update the at least one first parameter according to the input image and the first latent vector and a loss function.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: September 5, 2023
    Assignee: Moxa Inc.
    Inventors: Wei-Yu Lee, Yu-Chiang Wang
  • Publication number: 20220405634
    Abstract: A learning module for handling classification tasks, configured to perform the following instructions: receiving a first plurality of parameters from a training module; and generating a first loss of a first task in a first domain and a second loss of a second task in a second domain according to the first plurality of parameters.
    Type: Application
    Filed: December 29, 2021
    Publication date: December 22, 2022
    Applicant: Moxa Inc.
    Inventors: Wei-Yu Lee, Jheng-Yu Wang, Yu-Chiang Wang
  • Patent number: 11386656
    Abstract: A computing device for handling video content analysis, comprises a preprocessing module, for receiving a first plurality of frames and for determining whether to delete at least one of the first plurality of frames according to an event detection, to generate a second plurality of frames according to the determination for the first plurality of frames; a first deep learning module, for receiving the second plurality of frames and for determining whether to delete at least one of the second plurality of frames according to a plurality of features of the second plurality of frames, to generate a third plurality of frames according to the determination for the second plurality of frames; and a second deep learning module, for receiving the third plurality of frames, to generate a plurality of prediction outputs of the third plurality of frames.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: July 12, 2022
    Assignee: Moxa Inc.
    Inventor: Wei-Yu Lee
  • Publication number: 20210319225
    Abstract: A computing device for handling video content analysis, comprises a preprocessing module, for receiving a first plurality of frames and for determining whether to delete at least one of the first plurality of frames according to an event detection, to generate a second plurality of frames according to the determination for the first plurality of frames; a first deep learning module, for receiving the second plurality of frames and for determining whether to delete at least one of the second plurality of frames according to a plurality of features of the second plurality of frames, to generate a third plurality of frames according to the determination for the second plurality of frames; and a second deep learning module, for receiving the third plurality of frames, to generate a plurality of prediction outputs of the third plurality of frames.
    Type: Application
    Filed: July 13, 2020
    Publication date: October 14, 2021
    Inventor: Wei-Yu Lee
  • Publication number: 20210224606
    Abstract: A computing device for handling anomaly detection, comprises an encoder, for receiving an input image, to generate a first latent vector comprising a semantic latent vector and a visual appearance latent vector according to the input image and at least one first parameter of the encoder; and a training module, coupled to the encoder, for receiving the input image and the first latent vector, to update the at least one first parameter according to the input image and the first latent vector and a loss function.
    Type: Application
    Filed: May 6, 2020
    Publication date: July 22, 2021
    Inventors: Wei-Yu Lee, Yu-Chiang Wang
  • Patent number: 11010871
    Abstract: A computing device for handling image super-resolution (ISR), comprises a generator module, for receiving at least one input image, to generate an output image according to at least one first parameter and a first plurality of feature maps generated by at least one first channel attention (CA); a discriminator module, for receiving the output image and a high resolution (HR) image, to generate a second plurality of feature maps and a third plurality of feature maps by at least one second CA, and to generate at least one score according to the second plurality of feature maps, the third plurality of feature maps and at least one second parameter; and a feedback module, for receiving the at least one score, to update the at least one first parameter and the at least one second parameter according to the at least one score and an objective function.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: May 18, 2021
    Assignee: Moxa Inc.
    Inventors: Wei-Yu Lee, Po-Yu Chuang, Yu-Chiang Wang
  • Publication number: 20210133925
    Abstract: A computing device for handling image super-resolution (ISR), comprises a generator module, for receiving at least one input image, to generate an output image according to at least one first parameter and a first plurality of feature maps generated by at least one first channel attention (CA); a discriminator module, for receiving the output image and a high resolution (HR) image, to generate a second plurality of feature maps and a third plurality of feature maps by at least one second CA, and to generate at least one score according to the second plurality of feature maps, the third plurality of feature maps and at least one second parameter; and a feedback module, for receiving the at least one score, to update the at least one first parameter and the at least one second parameter according to the at least one score and an objective function.
    Type: Application
    Filed: February 20, 2020
    Publication date: May 6, 2021
    Inventors: Wei-Yu Lee, Po-Yu Chuang, Yu-Chiang Wang
  • Patent number: 8939811
    Abstract: An optical toy is disclosed. The optical toy includes a frame, at least one emitting part, at least one receiving part, a plurality of light guiding parts, and at least one power source. The frame includes a container and at least one containing structure. The emitting part is movably located on the containing structure. The emitting part includes at least one light source for emitting light. The receiving part is movably located on the containing structure. The receiving part includes a light sensor for sensing the light. The plurality of light guiding parts is located in the container for changing the direction of the light. The relative positions of the plurality of light guiding parts can be changed. The power source is located in the frame for providing power to the optical toy.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: January 27, 2015
    Assignee: Lattice Energy Technology Corporation
    Inventors: Ta-Yi Chien, Chien-Hsun Kao, Shih-Han Tseng, Hai-Yin Hsu, Kuan-Yu Chen, Fen-Ling Hu, Wei-Yu Lee, Kun-Yi Lee, Yen-Juei Lin, Chien-Chun Chen, Min-Han Lin, Chia-Yu Guo, Chun-Han Chou, Shang-Ching Lin, Chin-Yu Chang, Han-Shun Liang
  • Publication number: 20140349544
    Abstract: An illuminable building block is disclosed. The illuminable building block has a cell body, at least one circuit board, at least one illuminating device, at least one photo sensing device, at least one circuit control module, and at least one assembly portion. The cell body has an accommodating space, and the circuit board is located therein. The at least one illuminating device is disposed at the inner surface of the circuit board, and each photo sensing device corresponds to at least one illuminating device. The at least one circuit control module is used for illuminating the illuminating device.
    Type: Application
    Filed: May 27, 2013
    Publication date: November 27, 2014
    Inventors: Ta-Yi CHIEN, Chien-Hsun KAO, Shih-Han TSENG, Hai-Yin HSU, Kuan-Yu CHEN, Fen-Ling HU, Wei-Yu LEE, Kun-Yi LEE, Yen-Juei LIN, Chien-Chun CHEN, Min-Han LIN, Chia-Yu GUO, Chun-Han CHOU, Shang-Ching LIN, Chin-Yu CHANG, Han-Shun LIANG