Abstract: A transmission circuit including an equalizer circuit, a slicer circuit, a signal detection circuit, and a control circuit is provided. The equalizer circuit performs an equalizing operation on an input signal according to preset states to output an equalizing signal corresponding to each preset state. The slicer circuit performs a slicing operation on the equalizing signal to output a slicing signal. The signal detection circuit detects and compares the equalizing signal and the slicing signal and accordingly adjusts the equalizer circuit to one of the preset states. The control circuit receives the slicing signal corresponding to each preset state, compares the slicing signal corresponding to each preset state with a plurality of signal patterns to generate a comparison result, and selects one of the preset states according to the comparison result, such that the control circuit let the equalizer circuit perform the equalizing operation according to the selected preset state.

Abstract: A temperature-compensated laser driving circuit for driving a laser component is provided. The temperature-compensated laser driving circuit includes: a temperature compensation circuit, configured to generate a second current based on a first current and a temperature-independent current; and a modulation current generating circuit, configured to generate a modulation current based on the second current, and calibrate optical power output of the laser component based on the modulation current. The first current is proportional to the absolute temperature. The second current and the first current have a slope relative to the absolute temperature respectively, and the slope of the second current relative to the absolute temperature is larger than of the slope of the first current relative to the absolute temperature.

Abstract: An optical transceiver module coupled to a device is provided. The optical transceiver module includes an electronic signal transmitting terminal coupled to a receiving terminal of the device, an electronic signal receiving terminal coupled to a transmitting terminal of the device, an optical signal receiving terminal coupled to the electronic signal transmitting terminal, and an optical signal transmitting terminal coupled to the electronic signal receiving terminal. When the optical transceiver module is at an normal operation state and the electronic signal receiving terminal does not receive any electronic signal over a first predetermined time period, the optical transceiver module enters a idle detection state to make the electronic signal transmitting terminal to perform a receiver termination detection to the device to determine whether the device is coupled to the optical transceiver module.

Abstract: A temperature-compensated laser driving circuit for driving a laser component is provided. The temperature-compensated laser driving circuit includes: a temperature compensation circuit, configured to generate a second current based on a first current and a temperature-independent current; and a modulation current generating circuit, configured to generate a modulation current based on the second current, and calibrate optical power output of the laser component based on the modulation current. The first current is proportional to the absolute temperature. The second current and the first current have a slope relative to the absolute temperature respectively, and the slope of the second current relative to the absolute temperature is larger than of the slope of the first current relative to the absolute temperature.

Abstract: A transmission circuit including an equalizer circuit, a slicer circuit, a signal detection circuit, and a control circuit is provided. The equalizer circuit performs an equalizing operation on an input signal according to preset states to output an equalizing signal corresponding to each preset state. The slicer circuit performs a slicing operation on the equalizing signal to output a slicing signal. The signal detection circuit detects and compares the equalizing signal and the slicing signal and accordingly adjusts the equalizer circuit to one of the preset states. The control circuit receives the slicing signal corresponding to each preset state, compares the slicing signal corresponding to each preset state with a plurality of signal patterns to generate a comparison result, and selects one of the preset states according to the comparison result, such that the control circuit let the equalizer circuit perform the equalizing operation according to the selected preset state.

Abstract: An exemplary foldable electronic device includes a processing portion, a keyboard, and a latching member. The processing portion includes a main housing. The keyboard is rotatably connected to the processing portion. The keyboard includes a metal housing. The latching member is arranged in the main housing. The latching member includes a magnet. When the keyboard abuts against the processing portion, the attraction force between the magnet and the metal housing is greater than the force of the gravity acting on the keyboard, the keyboard is attached to the processing portion.

Abstract: An exemplary foldable electronic device includes a processing portion, a keyboard, and a latching member. The processing portion includes a main housing. The keyboard is rotatably connected to the processing portion. The keyboard includes a metal housing. The latching member is arranged in the main housing. The latching member includes a magnet. When the keyboard abuts against the processing portion, the attraction force between the magnet and the metal housing is greater than the force of the gravity acting on the keyboard, the keyboard is attached to the processing portion.

Abstract: A docking station for receiving a tablet computer is disclosed. The docking station for a tablet computer comprises a bracket defining a restricting space, a flange mounted on the bracket, the flange defining a cutout above the restricting space; and a sliding member movably mounted on the flange, wherein the sliding member is adapted to move on the flange between a first position and a second position; in the first position, the sliding member is moved into the cutout, the restricting space is separated from an outer space of the docking station; and in the second position, the sliding member is moved out of the cutout, the restricting space is communicating with the outer space of the docking station via the cutout.

Abstract: A clock data recovery circuit with feedback type phase discrimination. The clock data recovery circuit has an output signal of B bits and comprises a sampler, a phase region decision circuit, a phase status register and a multiplexer. The sampler oversamples k*B bits per cycle from a data input signal according to a sampling clock signal. The phase region decision circuit generates a plurality of binary up-down decision signals according to the oversampled data input signal and a current phase status signal. The phase status register generates the current phase status signal according to the binary up-down decision signals. The multiplexer selects data of B bits from the oversampled data input signal according to the current phase status signal.

Abstract: A clock data recovery circuit with feedback type phase discrimination. The clock data recovery circuit has an output signal of B bits and comprises a sampler, a phase region decision circuit, a phase status register and a multiplexer. The sampler oversamples k*B bits per cycle from a data input signal according to a sampling clock signal. The phase region decision circuit generates a plurality of binary up-down decision signals according to the oversampled data input signal and a current phase status signal. The phase status register generates the current phase status signal according to the binary up-down decision signals. The multiplexer selects data of B bits from the oversampled data input signal according to the current phase status signal.

Abstract: A phase lock loop (PLL) clock generator with programmable frequency and skew is provided in the present invention, in which frequency of clock signals generated can be dynamically changed and skew of the clock signals generated can be dynamically adjusted by a computer program. Also, the signal skew due to the change of loading can be compensated. Therefore, the PLL clock generator based on a closed-loop configuration can better control the skew of clock signals to provide higher stability and durability to the system.