Abstract: A package assembly includes a substrate, an electronic component and a cover. The electronic component and the cover are disposed on the substrate, wherein the electronic component is located within a chamber between the cover and the substrate. A cooling liquid may be filled in a heat dissipation space of the cover, so as to dissipate the heat generated by the electronic component. Furthermore, the cooling liquid may be filled in the chamber where the electronic component is located, so as to directly dissipate the heat generated by the electronic component.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor device including a first image sensor element and a second image sensor element disposed within a substrate. An interconnect structure is disposed along a front-side surface of the substrate and comprises a plurality of conductive wires, a plurality of conductive vias, and a first absorption structure. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths. The second image sensor element is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The second image sensor element is laterally adjacent to the first image sensor element. Further, the first image sensor element overlies the first absorption structure and is spaced laterally between opposing sidewalls of the first absorption structure.

Abstract: Various embodiments of the present application are directed towards image sensors including composite backside illuminated (CBSI) structures to enhance performance. In some embodiments, a first trench isolation structure extends into a backside of a substrate to a first depth and comprises a pair of first trench isolation segments. A photodetector is in the substrate, between and bordering the first trench isolation segments. A second trench isolation structure is between the first trench isolation segments and extends into the backside of the substrate to a second depth less than the first depth. The second trench isolation structure comprises a pair of second trench isolation segments. An absorption enhancement structure overlies the photodetector, between the second trench isolation segments, and is recessed into the backside of the semiconductor substrate. The absorption enhancement structure and the second trench isolation structure collectively define a CBSI structure.

Abstract: Optical sensors and their making methods are described herein. In some embodiments, a described sensing apparatus includes: an image sensor; a collimator above the image sensor, wherein the collimator includes an array of apertures; and an optical filtering layer above the collimator, wherein the optical filtering layer is configured to filter a portion of light to be transmitted into the array of apertures.

Abstract: Some embodiments relate to a CMOS image sensor disposed on a substrate. A plurality of pixel regions comprising a plurality of photodiodes, respectively, are configured to receive radiation that enters a back-side of the substrate. A boundary deep trench isolation (BDTI) structure is disposed at boundary regions of the pixel regions, and includes a first set of BDTI segments extending in a first direction and a second set of BDTI segments extending in a second direction perpendicular to the first direction to laterally surround the photodiode. The BDTI structure comprises a first material. A pixel deep trench isolation (PDTI) structure is disposed within the BDTI structure and overlies the photodiode. The PDTI structure comprises a second material that differs from the first material, and includes a first PDTI segment extending in the first direction such that the first PDTI segment is surrounded by the BDTI structure.

Abstract: Embodiments include a method for forming an integrated circuit package. A first dielectric layer is deposited over a wafer, the first dielectric layer overlapping a package region and a scribe line region of the wafer. A first metallization pattern is formed extending along and through the first dielectric layer. A second dielectric layer is deposited over the first metallization pattern and the first dielectric layer, the second dielectric layer overlapping the package region and the scribe line region. The second dielectric layer is removed from the scribe line region, the second dielectric layer remaining in the package region. After the second dielectric layer is removed from the scribe line region, a second metallization pattern is formed extending along and through the second dielectric layer. The wafer and the first dielectric layer are sawed in the scribe line region.

Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.

Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.

Abstract: Various embodiments of the present application are directed towards image sensors including composite backside illuminated (CBSI) structures to enhance performance. In some embodiments, a first trench isolation structure extends into a backside of a substrate to a first depth and comprises a pair of first trench isolation segments. A photodetector is in the substrate, between and bordering the first trench isolation segments. A second trench isolation structure is between the first trench isolation segments and extends into the backside of the substrate to a second depth less than the first depth. The second trench isolation structure comprises a pair of second trench isolation segments. An absorption enhancement structure overlies the photodetector, between the second trench isolation segments, and is recessed into the backside of the semiconductor substrate. The absorption enhancement structure and the second trench isolation structure collectively define a CBSI structure.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.

Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a magnetic element over the substrate. The magnetic element has multiple sub-layers, and each sub-layer is wider than another sub-layer above it. The semiconductor device structure also includes an isolation layer extending exceeding edges the magnetic element, and the isolation layer contains a polymer material. The semiconductor device structure further includes a conductive line over the isolation layer and extending exceeding the edges of the magnetic element.

Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes at least one device on a front side of a semiconductor substrate. A plurality of grating layers are under the at least one device. The plurality of grating layers include at least a first material having a first refractive index alternating with a second material having a second refractive index. Contacts extend through an interlevel dielectric material, and further extend through the semiconductor substrate, to directly contact at least one of the first material and the second material below the at least one device and below the semiconductor substrate underlying the interlevel dielectric material.

Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.

Abstract: An integrated circuit device includes a first-type active-region semiconductor structure extending and a second-type active-region semiconductor structure both extending in a first direction. The second-type active-region semiconductor structure is stacked with the first-type active-region semiconductor structure. The integrated circuit device also includes a front-side conductive layer above the two active-region semiconductor structures and a back-side conductive layer below the two active-region semiconductor structures. The integrated circuit device still includes a front-side power rail extending in the second direction in the front-side conductive layer and a back-side power rail extending in the second direction in the back-side conductive layer. The integrated circuit device further includes a first source conductive segment connected to the front-side power rail and a second source conductive segment connected to the back-side power rail.

Abstract: An electronic device is provided. The electronic device includes a first subscriber identity module (SIM), a second SIM, and a processor. The processor is configured to merge a first signal from the first SIM and a second signal from the second SIM and transmit the first signal and the second signal through a radio frequency front end (RFFE) transmission path concurrently, in response to a determination that the first signal and the second signal are intra-band signals and the first SIM and the second SIM share one RFFE transmission path.

Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a fin-shaped structure on a substrate, forming a first trench and a second trench in the fin-shaped structure, forming a first dielectric layer in the first trench and the second trench, removing part of the first dielectric layer, forming a second dielectric layer in the first trench and the second trench to form a first single diffusion break (SDB) structure and a second SDB structure, and then forming a gate structure on the fin-shaped structure, the first SDB structure, and the second SDB structure.

Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.