Patents by Inventor Wei-Yuan Huang

Wei-Yuan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240381776
    Abstract: A semiconductor structure includes a substrate, a piezoelectric layer, and a stress structure. The substrate includes a first surface and a second surface, wherein a portion of the substrate proximal to the first surface defines a diaphragm. The piezoelectric layer is disposed over the first surface of the substrate and surrounds the diaphragm, wherein the piezoelectric layer includes a first portion and a second portion arranged along a periphery of the diaphragm from a top view. The stress structure includes a plurality of dielectric layers disposed over the piezoelectric layer and between the substrate and the piezoelectric layer, and a total thickness of a first portion of the stress structure overlapping the first portion of the piezoelectric layer is different from a total thickness of a second portion of the stress structure overlapping the second portion of the piezoelectric layer. A method for manufacturing a semiconductor structure is also provided.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 14, 2024
    Inventors: SHENG KAI YEH, CHI-YUAN SHIH, SHIH-FEN HUANG, WEI CHUN WANG, SHAO-DA WANG
  • Patent number: 12142565
    Abstract: Vias, along with methods for fabricating vias, are disclosed that exhibit reduced capacitance and resistance. An exemplary interconnect structure includes a first source/drain contact and a second source/drain contact disposed in a dielectric layer. The first source/drain contact physically contacts a first source/drain feature and the second source/drain contact physically contacts a second source/drain feature. A first via having a first via layer configuration, a second via having a second via layer configuration, and a third via having a third via layer configuration are disposed in the dielectric layer. The first via and the second via extend into and physically contact the first source/drain contact and the second source/drain contact, respectively. A first thickness of the first via and a second thickness of the second via are the same. The third via physically contacts a gate structure, which is disposed between the first source/drain contact and the second source/drain contact.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: November 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Shih-Che Lin, Po-Yu Huang, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang, Rueijer Lin, Wei-Jung Lin, Chen-Yuan Kao
  • Patent number: 12136673
    Abstract: A semiconductor device and method of manufacturing the semiconductor device are provided. An exemplary semiconductor device comprises a fin disposed over a substrate, wherein the fin includes a channel region and a source/drain region; a gate structure disposed over the substrate and over the channel region of the fin; a source/drain feature epitaxially grown in the source/drain region of the fin, wherein the source/drain feature includes a top epitaxial layer and a lower epitaxial layer formed below the top epitaxial layer, and the lower epitaxial layer includes a wavy top surface; and a contact having a wavy bottom surface matingly engaged with the wavy top surface of the lower epitaxial layer of the source/drain feature.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: November 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ta Yu, Yen-Chieh Huang, Wei-Yuan Lu, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20240363576
    Abstract: A semiconductor package structure includes a semiconductor die encapsulated in a molding compound, a redistribution structure over the semiconductor die and the molding compound, a surface device over and electrically connected to the redistribution structure, a first connector over and electrically connected to the redistribution structure, a second connector between the surface device and the redistribution structure, a trench in the redistribution structure and laterally surrounding the surface device in a top view of the semiconductor package structure, and an underfill. The second connector electrically connects the surface device to the redistribution structure. The underfill surrounds the second connector. The underfill include a first portion and a second portion. The first portion of the underfill is located between the surface device and the redistribution structure and laterally surrounding the second connector, and the second portion of the underfill is disposed in the trench.
    Type: Application
    Filed: April 25, 2023
    Publication date: October 31, 2024
    Inventors: WEI-YU CHOU, YANG-CHE CHEN, YI-LUN YANG, TING-YUAN HUANG, HSIANG-TAI LU
  • Patent number: 12125525
    Abstract: A memory device and a method of operating the memory device are disclosed. In one aspect, the memory device includes a word line driver connected to a word line, a row of memory cells connected to the word line, each memory cell powered by a first supply voltage, and a power circuit. The power circuit is configured to provide the first supply voltage to the word line driver when a read condition is satisfied, and a second supply voltage to the word line driver when the read condition is not satisfied, the second supply voltage being less than the first supply voltage.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: October 22, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Hsien Huang, Wei-jer Hsieh, Tsung-Yuan Huang, Yu-Hao Hsu
  • Patent number: 12104786
    Abstract: A burner of a gas stove includes a burner body, a partition member, and at least one flame cover. The burner body includes a gas conduit and a base. The gas conduit has at least one gas input passage for injecting gas and air, and the base has at least one mixture passage for mixing the gas and the air. The at least one mixture passage communicates with the at least one gas input passage. The partition member has a plurality of through holes and covers the at least one mixture passage. The at least one flame cover provided with a plurality of flame holes covers the partition member. Whereby, the size of the burner of the gas stove is reduced significantly, and the gas can mix with the air effectively and uniformly.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: October 1, 2024
    Assignee: GRAND MATE CO., LTD.
    Inventors: Chung-Chin Huang, Chin-Ying Huang, Hsin-Ming Huang, Hsing-Hsiung Huang, Yen-Jen Yeh, Wei-Long Chen, Kuan-Chou Lin, Tang-Yuan Luo
  • Publication number: 20240321568
    Abstract: A single-side stopping and vibration absorbing lamp sleeve for fitting with an end part of an electrodeless lamp and being partially disposed in a mounting hole of a metal member includes: a large-diameter part; and a small-diameter part coaxially connected to the large-diameter part, wherein a through hole is formed in the large-diameter part and the small-diameter part, the end part fits with the through hole, an aperture of the through hole ranges between 2.9 mm and 3.1 mm, and an outer diameter of the small-diameter part ranges between 3.2 mm and 3.6 mm. Thus, it is possible to optimize mounting and working states of the lamp sleeves, decrease the vibration, movement and rotation generated when the electrodeless lamp is operating, and increase the service lifetime of the electrodeless lamp. An electrodeless lamp illumination device is also disclosed.
    Type: Application
    Filed: March 13, 2024
    Publication date: September 26, 2024
    Inventors: Wei-Ming HUANG, Ming Yuan HU, Tse Tsao CHANG
  • Publication number: 20240312492
    Abstract: An integrated circuit (IC) device includes a plurality of memory segments. Each memory segment includes a plurality of memory cells, and a local bit line electrically coupled to the plurality of memory cells and arranged on a first side of the IC device. The IC device further includes a global bit line electrically coupled to the plurality of memory segments, and arranged on a second side of the IC device. The second side is opposite the first side in a thickness direction of the IC device.
    Type: Application
    Filed: August 8, 2023
    Publication date: September 19, 2024
    Inventors: Yen Lin CHUNG, Kao-Cheng LIN, Wei-Cheng WU, Pei-Yuan LI, Chien-Chen LIN, Chun-Tse CHOU, Chien Hui HUANG, Yung-Ning TU, Shang Lin WU, Chia-Che CHUNG, Chia-Chi HUNG, Wei Min CHAN, Yen-Huei CHEN
  • Patent number: 12094703
    Abstract: A single-side stopping and vibration absorbing lamp sleeve for fitting with an end part of an electrodeless lamp and being partially disposed in a mounting hole of a metal member includes: a large-diameter part; and a small-diameter part coaxially connected to the large-diameter part, wherein a through hole is formed in the large-diameter part and the small-diameter part, the end part fits with the through hole, an aperture of the through hole ranges between 2.9 mm and 3.1 mm, and an outer diameter of the small-diameter part ranges between 3.2 mm and 3.6 mm. Thus, it is possible to optimize mounting and working states of the lamp sleeves, decrease the vibration, movement and rotation generated when the electrodeless lamp is operating, and increase the service lifetime of the electrodeless lamp. An electrodeless lamp illumination device is also disclosed.
    Type: Grant
    Filed: March 13, 2024
    Date of Patent: September 17, 2024
    Assignee: KANAUE APPLIED MATERIALS CORP.
    Inventors: Wei-Ming Huang, Ming Yuan Hu, Tse Tsao Chang
  • Publication number: 20240295810
    Abstract: A method for manufacturing a semiconductor device includes forming a photoresist layer comprising a photoresist composition over a substrate to form a photoresist-coated substrate. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern in the photoresist layer. The latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a patterned photoresist layer exposing a portion of the substrate, and a purge gas is applied to the patterned photoresist layer.
    Type: Application
    Filed: May 14, 2024
    Publication date: September 5, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Han HUANG, Hao Yuan CHANG, Yao-Hwan KAO
  • Publication number: 20240264405
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Application
    Filed: April 16, 2024
    Publication date: August 8, 2024
    Inventors: Chao-Chang HU, Liang-Ting HO, Chen-Er HSU, Yi-Liang CHAN, Fu-Lai TSENG, Fu-Yuan WU, Chen-Chi KUO, Ying-Jen WANG, Wei-Han HSIA, Yi-Hsin TSENG, Wen-Chang LIN, Chun-Chia LIAO, Shou-Jen LIU, Chao-Chun CHANG, Yi-Chieh LIN, Shang-Yu HSU, Yu-Huai LIAO, Shih-Wei HUNG, Sin-Hong LIN, Kun-Shih LIN, Yu-Cheng LIN, Wen-Yen HUANG, Wei-Jhe SHEN, Chih-Shiang WU, Sin-Jhong SONG, Che-Hsiang CHIU, Sheng-Chang LIN
  • Publication number: 20230384013
    Abstract: A making device of ice balls comprises a refrigeration chamber unit; the refrigeration chamber unit comprises a lower half ball mold body, an upper half ball mold body and a water circulation unit; in addition, a cover plate is arranged above the refrigeration chamber unit, and a water injection hole is arranged on the cover plate; in addition, a plurality of low-temperature condensing tubes are arranged in the lower half ball mold body; in addition, the refrigeration chamber unit further comprises a thermo electric cooler, and a cold end face of the thermo electric cooler is attached to a bottom surface of the lower half ball mold body; the upper half ball mold body is arranged above the lower half ball mold body, a plurality of convection circulation holes are distributed on the upper half ball mold body, and a water inlet hole is arranged in the center of the upper half ball mold body; and the water circulation unit is arranged on the cover plate and comprises a pump, and the pump is respectively connected
    Type: Application
    Filed: May 25, 2023
    Publication date: November 30, 2023
    Inventors: Xiang-Tai Lu, Shi-Jie Wang, Wei-Yuan Huang, Zhi-Xiang Dai, Jeff Chen
  • Patent number: 10437110
    Abstract: A color filter substrate and a display panel are provided. The color filter substrate includes a substrate, first spacers, second spacers, color resist patterns, and at least one dummy-color resist pattern. A first area has a first projection area A. A second area has a second projection area B. The color resist patterns are disposed at least partially around of at least one of the first spacers. A covering area of the color resist patterns in the first area is a. (a/A)*100% is defined as a first coverage rate M. The dummy-color resist pattern is disposed at least partially around of at least one of the second spacers. The covering area of the dummy-color resist pattern in the second area is b. (b/B)*100% is defined as a second coverage rate N. The first projected area A is equal to the second projected area B and 27%?(N?M)?58%.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: October 8, 2019
    Assignee: Au Optronics Corporation
    Inventors: Rung-Guang Hu, Wei-Yuan Huang, Sung-Ying Tsai, Hsiang-Pin Fan, Pin-Miao Liu
  • Publication number: 20180321536
    Abstract: A color filter substrate and a display panel are provided. The color filter substrate includes a substrate, first spacers, second spacers, color resist patterns, and at least one dummy-color resist pattern. A first area has a first projection area A. A second area has a second projection area B. The color resist patterns are disposed at least partially around of at least one of the first spacers. A covering area of the color resist patterns in the first area is a. (a/A)*100% is defined as a first coverage rate M. The dummy-color resist pattern is disposed at least partially around of at least one of the second spacers. The covering area of the dummy-color resist pattern in the second area is b. (b/B)*100% is defined as a second coverage rate N. The first projected area A is equal to the second projected area B and 27% ?, (N-M)?58%.
    Type: Application
    Filed: December 4, 2017
    Publication date: November 8, 2018
    Applicant: Au Optronics Corporation
    Inventors: Rung-Guang Hu, Wei-Yuan Huang, Sung-Ying Tsai, Hsiang-Pin Fan, Pin-Miao Liu
  • Publication number: 20160205776
    Abstract: A cover film with high dimensional stability includes an insulation film, a first adhesive layer, and a carrier. A first side of the first adhesive layer is connected to a first surface of the insulation film, and a second side of the first adhesive layer is configured to adhere to at least one metal conductor of a flexible printed circuit board. The carrier includes a supporting film and a second adhesive layer. A first side of the second adhesive layer is connected to the supporting film, and a second side of the second adhesive layer is adhered to a second surface of the insulation film, wherein bonding strength of the second adhesive film is smaller than bonding strength of the first adhesive film.
    Type: Application
    Filed: February 12, 2015
    Publication date: July 14, 2016
    Inventors: Hsiu-Chu Wu, Ching-Wen Yu, Wen-Chien Chen, Wu-Ying Su, Wei-Yuan Huang, Meng-Cheng Tsai, Chi-Sheng Hung
  • Patent number: 5043490
    Abstract: Novel 1,1,2-trifluorodienes, which have a minimum of seven carbon atoms and may contain in their molecule a phenylene or a methylphenylene moiety, are useful monomers, that can be polymerized in the presence of either free radical or coordination catalysts and can undergo selective reactions such, as for example, epoxidation of the vinyl (nonfluorinated) double bond. The resulting perfluorovinyl epoxy compounds also are useful monomers, which can undergo polymerization to useful materials.
    Type: Grant
    Filed: May 30, 1990
    Date of Patent: August 27, 1991
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Ming-Hong Hung, Aaron C. Su, Wei-Yuan Huang, Yuanfa Zhang