Patents by Inventor Wei-Zen Chou

Wei-Zen Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7037628
    Abstract: The invention calculates an optimum etch recipe for etching a product pattern in an opaque material of a photolithographic exposure mask with the objective of achieving optimum CD performance of the product pattern. If, for this optimum etch recipe, the optimum CD performance cannot be achieved, dummy patterns are added to the mask that is used to etch the opaque material. If this latter approach still cannot achieve optimum CD performance, the product pattern to which the dummy pattern has been added is separated into two patterns such that one of these two patterns provides a Cr loading that assures optimum CD performance of the product pattern.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: May 2, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fei-Gwo Tsai, Wei-Zen Chou, Zong-Xian Tsai
  • Publication number: 20050089765
    Abstract: The invention calculates an optimum etch recipe for etching a product pattern in an opaque material of a photolithographic exposure mask with the objective of achieving optimum CD performance of the product pattern. If, for this optimum etch recipe, the optimum CD performance cannot be achieved, dummy patterns are added to the mask that is used to etch the opaque material. If this latter approach still cannot achieve optimum CD performance, the product pattern to which the dummy pattern has been added is separated into two patterns such that one of these two patterns provides a Cr loading that assures optimum CD performance of the product pattern.
    Type: Application
    Filed: October 27, 2003
    Publication date: April 28, 2005
    Inventors: Fei-Gwo Tsai, Wei-Zen Chou, Zong-Xian Tsai
  • Patent number: 6872507
    Abstract: A method for forming a patterned microelectronics layer employing electron beam lithography in a sensitive material upon a substrate with optimal correction for proximity effects resulting from electron back scattering into the resist material. There is provided a substrate having formed thereon a layer of resist material sensitive to electron beam exposure. There is then exposed the sensitive layer to a vector scan shaped electron beam to write a primary pattern with dose correction of the beam dose for proximity effects due to electron scattering at each point in the primary pattern. There is then written a secondary pattern which is a negative reversed image of the primary pattern in a secondary exposure employing a vector scan shaped focused electron beam at an exposure dose substantially below the primary beam dose, there being provided a gap between the primary pattern and the secondary pattern.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: March 29, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: San-De Tzu, Ching Shiun Chiu, Wei-Zen Chou, Chia Fang Wu
  • Publication number: 20040086786
    Abstract: A method for forming a patterned microelectronics layer employing electron beam lithography in a sensitive material upon a substrate with optimal correction for proximity effects resulting from electron back scattering into the resist material. There is provided a substrate having formed thereon a layer of resist material sensitive to electron beam exposure. There is then exposed the sensitive layer to a vector scan shaped electron beam to write a primary pattern with dose correction of the beam dose for proximity effects due to electron scattering at each point in the primary pattern There is then written a secondary pattern which is a negative reversed image of the primary pattern in a secondary exposure employing a vector scan shaped focused electron beam at an exposure dose substantially below the primary beam dose, there being provided a gap between the primary pattern and the secondary pattern.
    Type: Application
    Filed: November 1, 2002
    Publication date: May 6, 2004
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventors: San-De Tzu, Ching Shiun Chiu, Wei-Zen Chou, Chia Fang Wu
  • Publication number: 20030228047
    Abstract: Protecting the transparent substrate of a photomask when repairing opaque defects of the mask is disclosed. The photomask includes an opaque defect on a transparent substrate. The photomask is coated with photoresist. The mask is backside-exposed to a light source, to expose the photoresist where it is unblocked by the mask's opaque defect and other opaque regions. The photoresist is removed where it was unexposed to the light source. The opaque defect and the other opaque regions of the mask are exposed through the photoresist, but the transparent regions of the mask—where the transparent substrate does not have the opaque defect or the other opaque regions thereon—remain protected by the photoresist. The opaque defect is then removed, such as by using a focused ion beam (FIB). The photoresist over the exposed transparent substrate protects the substrate from riverbed effects and gallium staining.
    Type: Application
    Filed: June 7, 2002
    Publication date: December 11, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Zen Chou, Chin-Wei Wen, Fei-Gwo Tsai
  • Patent number: 6428938
    Abstract: An improved phase-shift photomask and method of fabrication are described. The method for making this phase-shift mask involves depositing an opaque film, such as chromium (Cr), on a transparent plate, such as SiO2 (quartz plate). An electron beam photoresist layer is deposited on the Cr film and is partially exposed in regions A and completely exposed in closely spaced alternate regions B by an electron beam. The exposed photoresist is then developed. The Cr film is etched in regions B while the remaining resist in regions A protect the Cr from etching. The e-bean resist is plasma etched back to remove the resist over regions A and then the quartz plate in regions B is recessed to a depth d by plasma etching while the Cr protects the quartz in regions A from etching. The recess is etched to a depth to provide an optical path difference between A and B of ½ wavelength (180°) when UV light is transmitted through the mask to expose resist on a product substrate.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: August 6, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chin-Hsiang Lin, Shy-Jay Lin, Sheng-Chi Chin, Wei-Zen Chou
  • Patent number: 6361911
    Abstract: A new method is provided for E-beam exposure. A new method is provided for variable shaped E-beam (VSB) and Gaussian laser and E-beam exposure systems. The conventional main pattern is, under the method of the invention involving VSB, surrounded on all sides by a dummy frame whereby the dummy frame limits the beam size of the exposure shots that are adjacent to the main pattern. All patterns that are created in this manner are therefore composites using the same exposure shot. This improves the CD uniformity of the pattern by reducing the shot linearity error for VSB exposure systems. For Gaussian beam exposure systems, the exposure shots are at times located exactly over the exposed figure. Typically, gray level is used to simulate the small figure, this however induces proximity effects. The method of the invention therefore also improves the proximity effect of the Gaussian beam exposure systems.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: March 26, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Fei-Gwo Tsai, Wei-Zen Chou
  • Patent number: 6294295
    Abstract: This invention describes an attenuating phase shifting mask, a method of forming the attenuating phase shifting mask, and a method of using the attenuating phase shifting mask to expose a contact hole pattern having both dense and isolated contact holes on a layer of photosensitive dielectric. The mask has a rim of first attenuating phase shifting material, having a first transmittance and providing a phase shift of 180°, surrounding the dense holes and a rim of second attenuating phase shifting material, having a second transmittance and providing a phase shift of 180°, surrounding the isolated holes. The second transmittance is greater than the first transmittance. The dense holes have a duty ratio of less than 2.0 and the isolated holes have a duty ratio of greater than or equal to 2.0.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: September 25, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chia-Hui Lin, San-De Tzu, Wei-Zen Chou
  • Patent number: 6277528
    Abstract: A method of forming a high transmittance attenuated phase-shifting mask blank, comprising the following steps. An attenuated phase-shifting mask is provided that includes a shifter layer overlying a transparent substrate. The attenuated phase-shifting mask having a first transmittance and an initial phase angle. The attenuated phase-shifting mask and more specifically the shifter layer is treated with an aqueous solution of NH4OH:H2O2 for a first predetermined time increasing the first transmittance to a second transmittance and decreasing the initial phase angle to a second phase angle. The attenuated phase-shifting mask is then treated with a selected acid or base for a second predetermined time increasing the second transmittance to a third, predetermined transmittance and increasing the phase angle to a third, predetermined phase angle. The third phase angle is preferably substantially identical to the initial phase angle.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: August 21, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: San-De Tzu, Wei-Zen Chou
  • Patent number: 6261725
    Abstract: A method for modulating the phase angle of a phase shift mask employed in deep ultraviolet (DUV) photolithography. There is provided a quartz substrate within which may be formed an engraved pattern, and upon which is formed a patterned phase shift layer. The phase angle of the phase shift layer upon the quartz substrate may be incrementally increased or decreased by subtractive etching of the phase shift layer and quartz substrate of the phase shift mask in an alkaline solution at a selected temperature and concentration for a period of time.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: July 17, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: San-De Tzu, Wei-Zen Chou, Ching-Shiun Chiu
  • Patent number: 6251547
    Abstract: A simple, cost-effective method for forming a lithography mask with a directly imaged portion and an attenuated, phase shifted portion. In particular, the use of such a method for forming an outrigger-type phase shift mask. The mask is formed on a blank consisting of a transparent quartz substrate over which is an attenuating phase shift layer and an optically opaque layer, by a process that produces a pattern in an E-beam sensitive resist with two different E-beam energy depositions. The higher energy deposition is used to form the main pattern, while the lower energy deposition forms the pattern for the outrigger.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: June 26, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: San-De Tzu, Chia-Hui Lin, Wei-Zen Chou
  • Patent number: 6190809
    Abstract: A mask combining an alternating phase shift part and an attenuating phase shift part on a single blank and a method of forming said mask. The method involves fewer processing steps, fewer layers of material and is more cost effective than other methods in the current art. A central reason for the simplicity of the method is the use of different intensity levels of E-beam exposure in a single resist layer and achieving phase shifts by transmitting radiation through alternating regions of the same transparent substrate that are etched and not etched.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: February 20, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: San-De Tzu, Ching-Shiun Chiu, Wei-Zen Chou