Patents by Inventor Wei Zhen Goh

Wei Zhen Goh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9679870
    Abstract: An integrated circuit (IC) device includes an IC and encapsulating material surrounding the IC. Leads are coupled to the IC and extend outwardly from sides of the encapsulating material, with each lead having three contiguous exposed segments with upper and lower bends defining a Z-shape. In another example, the leads include an upper horizontal segment, lower horizontal segment, and intermediate curved segment extending upwardly from the upper horizontal segment and downwardly to the lower horizontal segment.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: June 13, 2017
    Assignee: STMicroelectronics Pte Ltd
    Inventors: Yiyi Ma, Kim-Yong Goh, Xueren Zhang, Wei Zhen Goh
  • Publication number: 20160172262
    Abstract: An integrated circuit (IC) device includes an IC and encapsulating material surrounding the IC. Leads are coupled to the IC and extend outwardly from sides of the encapsulating material, with each lead having three contiguous exposed segments with upper and lower bends defining a Z-shape. In another example, the leads include an upper horizontal segment, lower horizontal segment, and intermediate curved segment extending upwardly from the upper horizontal segment and downwardly to the lower horizontal segment.
    Type: Application
    Filed: December 10, 2014
    Publication date: June 16, 2016
    Inventors: Yiyi MA, Kim-Yong GOH, Xueren ZHANG, Wei Zhen GOH
  • Patent number: 8907465
    Abstract: Methods and devices for packaging integrated circuits. A packaged device may include an integrated circuit, a first packaging component including a patterned surface, and a second packaging component. The patterned surface of the first packaging component may be adhesively coupled to a surface of the second packaging component or a surface of the integrated circuit. The integrated circuit may be at least partially enclosed between the first and second packaging components. A packaging method may include patterning a surface of a packaging component of an integrated circuit package. The surface of the packaging component may be for adhesively coupling to a second component to at least partially enclose an integrated circuit in the integrated circuit package.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: December 9, 2014
    Assignee: STMicroelectronics Pte Ltd
    Inventors: Kim-Yong Goh, Yiyi Ma, Wei Zhen Goh
  • Publication number: 20140291782
    Abstract: Methods and devices for packaging integrated circuits. A packaged device may include an integrated circuit, a first packaging component including a patterned surface, and a second packaging component. The patterned surface of the first packaging component may be adhesively coupled to a surface of the second packaging component or a surface of the integrated circuit. The integrated circuit may be at least partially enclosed between the first and second packaging components. A packaging method may include patterning a surface of a packaging component of an integrated circuit package. The surface of the packaging component may be for adhesively coupling to a second component to at least partially enclose an integrated circuit in the integrated circuit package.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 2, 2014
    Applicant: STMicroelectronics Pte Ltd.
    Inventors: Kim-Yong Goh, Yiyi Ma, Wei Zhen Goh