Patents by Inventor Wei-Chung Chen
Wei-Chung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20260186319Abstract: A display device includes a substrate, display elements, light-mixing wells, a light exit structure, and a filling layer. The display elements are disposed on the substrate and include first-color display elements and second-color display elements. The light-mixing wells are disposed on the display elements. Each light-mixing well overlaps at least one corresponding first-color display element and at least one corresponding second-color display element. Each light-mixing well has a first surface facing the substrate and a second surface facing the light exit structure, and an orthographic projection area of the first surface on the substrate is greater than an orthographic projection area of the second surface on the substrate. The light exit structure is disposed on the light-mixing wells. The filling layer is located between the light-mixing wells, wherein a refractive index of the filling layer is less than a refractive index of the light-mixing wells.Type: ApplicationFiled: April 9, 2025Publication date: July 2, 2026Applicant: Industrial Technology Research InstituteInventors: Wei-Chung Chen, Yi-Hsiang Huang, Chun-Ting Lin, Chen-Wei Lin, Ruo-Lan Chang
-
Publication number: 20260163535Abstract: An integrated resistive element adapted to be configured as an integrated sensing unit and electronic apparatus including the same. The integrated resistive element in an embodiment may include a plurality of resistive segments including a first portion disposed in or on a first well formed in a substrate and a second portion disposed in or on a second well formed in the substrate. The second portion is for being electrically coupled between a first terminal and a sensing terminal of the integrated resistive element. The first portion is for being electrically coupled between the sensing terminal and a second terminal of the integrated resistive element.Type: ApplicationFiled: December 3, 2025Publication date: June 11, 2026Inventors: Wei-Chung Chen, Yu-Huei Lee
-
Publication number: 20260164770Abstract: An integrated resistive element adapted to be configured as an integrated sensing unit and electronic apparatus including the same. The integrated resistive element in an embodiment may include a plurality of resistive segments including a first portion disposed in or on a first well formed in a substrate and a second portion disposed in or on a second well formed in the substrate. The second portion is for being electrically coupled between a first terminal and a sensing terminal of the integrated resistive element. The first portion is for being electrically coupled between the sensing terminal and a second terminal of the integrated resistive element. In an embodiment, the first well is configured to be biased from a first well bias circuit. In an embodiment, the second well is configured to be biased from a second well bias circuit.Type: ApplicationFiled: December 3, 2025Publication date: June 11, 2026Inventors: WEI-CHUNG Chen, Yu-Huei Lee
-
Publication number: 20260163533Abstract: An integrated resistive element adapted to be configured as an integrated sensing unit and electronic apparatus including the same. The integrated resistive element in an embodiment includes a plurality of resistive segments disposed in or on a well formed in a substrate. The plurality of resistive segments are arranged in an array or a matrix and are configured for being electrically coupled in series with each other between a first terminal and a second terminal of the integrated resistive element. The integrated resistive element in an embodiment further includes a sensing terminal disposed between a first portion of the plurality of resistive segments and a second portion of the plurality of resistive segments and for being electrically coupled to the first portion and the second portion of the plurality of resistive segments.Type: ApplicationFiled: December 3, 2025Publication date: June 11, 2026Inventors: WEI-CHUNG Chen, Yu-Huei Lee
-
Patent number: 12648160Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes performing a first degas process on the substrate. The method includes forming a first magnetic layer over the substrate. The method includes forming a second magnetic layer on the first magnetic layer. The method includes performing a second degas process on the substrate, the first magnetic layer, and the second magnetic layer. The method includes forming a third magnetic layer on the second magnetic layer after the second degas process is performed. The method includes partially removing the first magnetic layer, the second magnetic layer, and the third magnetic layer.Type: GrantFiled: November 17, 2023Date of Patent: June 2, 2026Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wei-Chung Chen, Jun-Yi Wu
-
Patent number: 12620719Abstract: A planar transparent antenna structure is provided. The planar transparent antenna structure includes a dielectric substrate, a radiation conductive layer and a ground conductive layer. The dielectric substrate has a first surface and a second surface. The radiation conductive layer is disposed on the first surface of the dielectric substrate. The ground conductive layer is disposed on the second surface of the dielectric substrate. The radiation conductive layer and the ground conductive layer are composed of a plurality of wires connected in a mesh manner. Each of the wires is composed of a plurality of grid lines connected in a mesh manner.Type: GrantFiled: April 3, 2024Date of Patent: May 5, 2026Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Bing-Syun Li, Li-Yang Tsai, Kuang-Hui Shih, Ruo-Lan Chang, Kung-Ching Chu, Wei-Chung Chen
-
Publication number: 20260121541Abstract: A control circuit for a multiphase voltage regulator includes a switching control circuit, and a monitor circuit. The switching control circuit is configured to provide a plurality of control signals to control a plurality of power stage circuits. Each of the power stage circuit is configured to provide a phase current. The monitor circuit is configured to receive at least one report signal from at least one of the power stage circuits, and determine whether the report signal indicates an activated phase. After the report signal indicating the activated phase is received, the control signal is provided to the power stage circuit determined as the activated phase.Type: ApplicationFiled: October 24, 2024Publication date: April 30, 2026Inventors: Wei-Chung Chen, Le Kong, Cong Deng, Yu-Huei Lee
-
Publication number: 20260121542Abstract: A control circuit for a multiphase voltage regulator includes a switching control circuit and a monitor circuit. The switching control circuit is configured to provide a control signal to control a plurality of power stage circuits. Each of the power stage circuit is configured to provide a phase current. The monitor circuit is configured to receive a report signal from at least one of the power stage circuits, and determine whether the report signal indicates a pre-charge period of the corresponding power stage circuit is finished. After the report signal indicates that the pre-charge period of the corresponding power stage circuit is finished, the control signal is provided to power on the corresponding power stage circuit.Type: ApplicationFiled: October 24, 2024Publication date: April 30, 2026Inventors: Wei-Chung Chen, Le Kong, Cong Deng, Yu-Huei Lee
-
Publication number: 20260106544Abstract: A dual-input voltage regulating circuit includes a first input terminal a second input terminal, and an output terminal. The first input terminal receives a first input voltage. The second input terminal receives a second input voltage. The first input voltage is higher than the second input voltage. The output terminal provides a regulated output voltage. The dual-input voltage regulating circuit draws power from at least one of the first input voltage and the second input voltage. When the regulated output voltage is maintained at a first voltage value, the dual-input voltage regulating circuit draws power from both the first input voltage and the second input voltage. When the regulated output voltage is maintained at a second voltage value that is higher than the first voltage value, the dual-input voltage regulating circuit draws power from the second input voltage and does not draw power from the first input voltage.Type: ApplicationFiled: October 10, 2024Publication date: April 16, 2026Inventors: Wei-Chung Chen, Yu-Huei Lee
-
Publication number: 20260023325Abstract: A digital lithography system includes a light source configured to emit a light beam along an optical path toward a substrate via one or more optical elements. The digital lithography system further includes a digital micro-mirror device (DMD) configured to receive the light beam and form an output light beam. The output light beam is emitted along the optical path toward the substrate. The digital lithography system further includes an imaging device configured to capture an image of the substrate illuminated at least in part by the output light beam. A first optical path length corresponding to the DMD and a second optical path length corresponding to the imaging device are unequal.Type: ApplicationFiled: July 17, 2024Publication date: January 22, 2026Inventors: ChiaHung Kao, Yen-Te Lee, Fuchyi Yang, Ulrich Mueller, Wei-chung Chen
-
Patent number: 12495650Abstract: This disclosure relates to a transparent display that includes a transparent substrate, a plurality of wires, and a plurality of electronic components. The wires are disposed on the transparent substrate, and the wires have at least one serpentine part having a first end and a second end that are opposite to each other. There is an extending path formed from the first end to the second end. The electronic components are disposed on the plurality of wires. The wires have at least one part that surrounds an opening area and has a total extending length. The at least one part of the wires includes the at least one serpentine part. A ratio of a sum in length of the at least one serpentine part along the extending path to the total extending length is equal to or greater than 10%.Type: GrantFiled: August 11, 2022Date of Patent: December 9, 2025Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ying-Ting Liou, Ruo-Lan Chang, Wei-Chung Chen, Hao Che Kao
-
Patent number: 12490559Abstract: A pixel structure is provided. The pixel structure includes a substrate and a conductive line electrically connected to the substrate. The ratio of the height to the width of the conductive line is between 0.5 and 6. The pixel structure also includes an electrode electrically connected to the conductive line and a conversion element electrically connected to the conductive lines through the electrode.Type: GrantFiled: December 30, 2021Date of Patent: December 2, 2025Assignee: Industrial Technology Research InstituteInventors: Yu-Chang Lin, Tai-Jui Wang, Chieh Wei Feng, Wei-Chung Chen
-
Publication number: 20250338670Abstract: An optical sensing structure includes an optical sensing element and at least one first reflector. The optical sensing element has a sensing surface configured to sense ambient light intensity. The first reflector is located at a side of the optical sensing element. The first reflector has a first front surface located over the sensing surface, a first back surface facing away from the first front surface and a first outer lateral surface located between the first front surface and the first back surface. When a length of the first front surface along a first direction is a_1, a length of the first back surface along the first direction is b_1, and an angle between the first outer lateral surface and the first back surface is ?_1, the following conditions are satisfied: 0<a_1/b_1?0.6 and 25 degrees??_1?65 degrees.Type: ApplicationFiled: August 21, 2024Publication date: October 30, 2025Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ruo-Lan CHANG, Yu- Hsiang LIU, Chen-Wei LIN, Kung-Ching CHU, Wei-Chung CHEN
-
Publication number: 20250311496Abstract: A light-emitting array module includes a light source array and microlens units disposed on the light source array. The light source array includes light-emitting elements arranged in an array. Each microlens unit includes a microlens, a stray light guiding layer, and a stray light reflecting layer. The stray light guiding layer is disposed at a side surface of the microlens. A refractive index of a medium or space at an outer side of the stray light guiding layer is less than a refractive index of the stray light guiding layer. The stray light reflecting layer is disposed at a side of the stray light guiding layer adjacent to the light source array. Light emitted by the light-emitting elements corresponding to the microlens units and reflected into the stray light guiding layer by the stray light reflecting layer undergoes total internal reflection on a surface of the stray light guiding layer.Type: ApplicationFiled: June 19, 2024Publication date: October 2, 2025Applicant: Industrial Technology Research InstituteInventors: Kung-Ching Chu, Wei-Chung Chen, Chia-Ping Lin, Hung Tsou, Chen-Wei Lin, Ruo-Lan Chang
-
Patent number: 12327936Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.Type: GrantFiled: December 22, 2022Date of Patent: June 10, 2025Assignee: Industrial Technology Research InstituteInventors: Meng-Hsuan Chen, Cheng-Hua Tsai, Mei-Ju Lee, Ruo-Lan Chang, Wei-Chung Chen
-
Publication number: 20250169084Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes performing a first degas process on the substrate. The method includes forming a first magnetic layer over the substrate. The method includes forming a second magnetic layer on the first magnetic layer. The method includes performing a second degas process on the substrate, the first magnetic layer, and the second magnetic layer. The method includes forming a third magnetic layer on the second magnetic layer after the second degas process is performed. The method includes partially removing the first magnetic layer, the second magnetic layer, and the third magnetic layer.Type: ApplicationFiled: November 17, 2023Publication date: May 22, 2025Inventors: Wei-Chung CHEN, Jun-Yi WU
-
Publication number: 20250162440Abstract: A system for managing vehicle charging adapted for a charging gun includes a communication bus, a battery, a sensor, an OBC, and a domain controller. The domain controller receives a first voltage and a second voltage that correspond to a current of charge to the battery from the sensor, and when determining that both the battery and the OBC are operating normally based on information received through the communication bus, notifies the OBC through the communication bus to start charging the battery with electricity received from the charging gun. When determining that an amount of charged power calculated using a calibrated voltage, which is obtained based on the first voltage or the second voltage, has reached a predetermined amount, the domain controller sends a stop message to the communication bus so as to notify the OBC to stop charging the battery.Type: ApplicationFiled: December 27, 2023Publication date: May 22, 2025Applicant: CHINA MOTOR CORPORATIONInventors: Bo-Yu GAO, Wei-Chung CHEN, Tzu-Hao CHEN
-
Patent number: 12272860Abstract: An antenna device based on a transparent substrate and a method of configuring an antenna device are provided. The antenna device includes a transparent substrate, a first dielectric layer, and an antenna. The transparent substrate includes a first surface and a second surface opposite to the first surface. The first dielectric layer includes a third surface and a fourth surface opposite to the third surface, wherein the first dielectric layer is in contact with the first surface via the third surface to be disposed on the transparent substrate, wherein a permittivity of the first dielectric layer is less than a permittivity of the transparent substrate. The antenna includes a radiation part, wherein the radiation part is disposed on one of the second surface and the fourth surface.Type: GrantFiled: December 29, 2022Date of Patent: April 8, 2025Assignee: Industrial Technology Research InstituteInventors: Wei-Chung Chen, Liyang Tsai, Kuang-Hui Shih, Ruo-Lan Chang, Mei-Ju Lee
-
Patent number: 12193303Abstract: An electronic device includes a transparent substrate, a number of pixel structures and a first trace structure. The transparent substrate includes a transparent region and a trace region. Each of the pixel structures has a sub-pixel structure of first color and a sub-pixel structure of second color. The sub-pixel structure of first color has a light emitting element of first color. The sub-pixel structure of second color has a light emitting element of second color. The first trace structure includes a first main trace, a first auxiliary trace and a second auxiliary trace. The first main trace is disposed in the trace region and surrounds a portion of the transparent region. The first auxiliary trace and the second auxiliary trace are electrically connected to the first main trace, and are electrically connected to the corresponding sub-pixel structure of first color and the corresponding sub-pixel structure of second color, respectively.Type: GrantFiled: November 27, 2020Date of Patent: January 7, 2025Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ying-Ting Liou, Ruo-Lan Chang, Wen-Yu Kuo, Wen-Ya Chao, Wei-Chung Chen
-
Publication number: 20240339758Abstract: A planar transparent antenna structure is provided. The planar transparent antenna structure includes a dielectric substrate, a radiation conductive layer and a ground conductive layer. The dielectric substrate has a first surface and a second surface. The radiation conductive layer is disposed on the first surface of the dielectric substrate. The ground conductive layer is disposed on the second surface of the dielectric substrate. The radiation conductive layer and the ground conductive layer are composed of a plurality of wires connected in a mesh manner. Each of the wires is composed of a plurality of grid lines connected in a mesh manner.Type: ApplicationFiled: April 3, 2024Publication date: October 10, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Bing-Syun LI, Li-Yang TSAI, Kuang-Hui SHIH, Ruo-Lan CHANG, Kung-Ching CHU, Wei-Chung CHEN