Patents by Inventor Wei-Da Chen

Wei-Da Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955460
    Abstract: In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Da Tsai, Meng-Tse Chen, Sheng-Feng Weng, Sheng-Hsiang Chiu, Wei-Hung Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Patent number: 11953738
    Abstract: The present invention discloses a display including a display panel and a light redirecting film disposed on the viewing side of the display panel. The light redirecting film comprises a light redistribution layer, and a light guide layer disposed on the light redistribution layer. The light redistribution layer includes a plurality of strip-shaped micro prisms extending along a first direction and arranged at intervals and a plurality of diffraction gratings arranged at the bottom of the intervals between the adjacent strip-shaped micro prisms, wherein each of the strip-shaped micro prisms has at least one inclined light-guide surface, and the bottom of each interval has at least one set of diffraction gratings, and the light guide layer is in contact with the strip-shaped micro prisms and the diffraction gratings.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: April 9, 2024
    Assignee: BenQ Materials Corporation
    Inventors: Cyun-Tai Hong, Yu-Da Chen, Hsu-Cheng Cheng, Meng-Chieh Wu, Chuen-Nan Shen, Kuo-Jung Huang, Wei-Jyun Chen, Yu-Jyuan Dai
  • Publication number: 20240006203
    Abstract: A chamber liner for a semiconductor process chamber. The chamber liner includes an outer sidewall having a first circumference, and an inner sidewall have a second circumference that is less than the first circumference. The chamber liner also includes a chamber liner fence that is positioned between the outer sidewall and the inner sidewall. The chamber liner fence includes a first zone having one or more first zone openings, a second zone having one or more second zone openings, and a third zone having one or more third zone opening. The chamber liner further includes a split door positioned in the outer sidewall. Each of the first, second, and third zones have different widths, with the width of the third zone opening less than the width of the second zone opening, and the second zone opening less than or equal to the width of the first zone opening.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Inventors: Chien-Liang Chen, Wei-Da Chen, Yu-Ning Cheng
  • Patent number: 11699596
    Abstract: In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: July 11, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsing-Hsiang Wang, Yu-Hsiang Lin, Wei-Da Chen, Tom Peng, P. Y. Chiu, Miau-Shing Tsai, Cheng-Yi Huang, Ching-Horng Chen
  • Publication number: 20220359164
    Abstract: A cantilever for gas flow direction control configured to support an electrode housing bowl in an associated etch process chamber. The cantilever may have a cross-section that is circular, elliptical, or airfoil shaped. The shape of the cantilever induces the flow of gas and etch products within the chamber around the cantilever, reducing turbulence around the edge of a wafer.
    Type: Application
    Filed: August 18, 2021
    Publication date: November 10, 2022
    Inventors: Chien-Liang Chen, Chien-Yu Wang, Wei-Da Chen, Yu-Ning Cheng, Shih-tsung Chen, Yung-Yao Lee
  • Publication number: 20220336228
    Abstract: An apparatus for perform metal etching and plasma ashing includes: a processing chamber having an enclosed area; an electrostatic chuck disposed in the enclosed area and configured to secure a wafer, the electrostatic chuck connected with a bias power; at least one coil connected with a source power; a etchant conduit configured provide an etchant to a metal of the wafer within the processing chamber in accordance with a photoresist mask of the wafer; and a gas intake conduit connected with a gas source, wherein the gas intake conduit is configured to supply the processing chamber with a gas from the gas source during performance of plasma ashing within the processing chamber.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Inventors: Hsing-Hsiang WANG, Yu-Hsiang Lin, Wei-Da Chen, Tom Peng, P.Y. Chiu, Miau-Shing Tsai, Cheng-Yi Huang, Ching-Horng Chen
  • Patent number: 10964653
    Abstract: A method for making a semiconductor device is disclosed. A substrate comprising semiconductor device elements is provided. A top conductive pad and an anti-reflective coating are patterned over the substrate. The anti-reflective coating is disposed on the top conductive pad. At least one passivation film is formed over the substrate and the anti-reflective coating. The at least one passivation film and the anti-reflective coating are etched to form a trench therein so as to expose a portion of the top conductive pad.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: March 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ya-Ping Su, Han-Wen Fung, Chia-Chi Chung, Chih-Hsien Hsu, Chun Yan Chen, Chien-Sheng Wu, Tien-Chih Huang, Wei-Da Chen, Chien-Hua Tseng
  • Publication number: 20200176269
    Abstract: In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.
    Type: Application
    Filed: November 14, 2019
    Publication date: June 4, 2020
    Inventors: Hsing-Hsiang WANG, Yu-Hsiang LIN, Wei-Da CHEN, Tom PENG, P.Y CHIU, Miau-Shing TSAI, Cheng-Yi HUANG, Ching-Horng CHEN
  • Publication number: 20190096831
    Abstract: A method for making a semiconductor device is disclosed. A substrate comprising semiconductor device elements is provided. A top conductive pad and an anti-reflective coating are patterned over the substrate. The anti-reflective coating is disposed on the top conductive pad. At least one passivation film is formed over the substrate and the anti-reflective coating. The at least one passivation film and the anti-reflective coating are etched to form a trench therein so as to expose a portion of the top conductive pad.
    Type: Application
    Filed: June 8, 2018
    Publication date: March 28, 2019
    Inventors: Ya-Ping Su, Han-Wen Fung, Chia-Chi Chung, Chih-Hsien Hsu, Chun Yan Chen, Chien-Sheng Wu, Tien-Chih Huang, Wei-Da Chen, Chien-Hua Tseng