Abstract: A pixel circuit, a driving method and a display device are provided. The pixel circuit includes N sub-pixels, N first initial voltage terminals and N second initial voltage terminals, wherein n is a positive integer less than or equal to N; an nth sub-pixel includes an nth driving circuit, an nth light emitting element, an nth one of first initialization circuits, an nth one of second initialization circuits and an nth one of first light emitting control circuits; the nth one of the first initialization circuits is configured to write an nth one of first initial voltages into an nth one of third nodes under the control of a first reset control signal; the nth one of the second initialization circuits is configured to write an nth one of second initial voltages into an nth one of second nodes under the control of a second reset control signal.

Abstract: A display substrate and a fabrication method therefor, and a display apparatus. The display substrate comprises partition structures (10) disposed on a substrate; an anode disposed on the substrate, wherein the orthographic projections of the anode and the partition structures (10) do not overlap on the substrate; a light-emitting layer (7) disposed on the side of the anode away from the substrate, the light-emitting layer (7) being connected to the anode and being interrupted at the partition structures (10); a cathode (3) disposed on the side of the light-emitting layer (7) away from the substrate, the cathode (3) being connected to the light-emitting layer (7) and being interrupted at the partition structures (10); and an auxiliary cathode (20) located on the same film layer as the anode and insulated from the anode, the auxiliary cathode (20) being electrically connected to the cathode (3).

Abstract: Disclosed are a display substrate and a manufacturing method therefor, and a display apparatus. The display substrate includes a plurality of circuit units forming a plurality of unit rows and a plurality of unit columns, at least one circuit unit includes a pixel drive circuit and a plurality of scan signal lines connected to the pixel drive circuit, the pixel drive circuit at least includes a plurality of transistors; in the direction perpendicular to the display substrate, the display substrate at least includes a first gate metal layer (GATE 1) arranged on the substrate (101) and a first source drain metal layer (SD1) arranged on a side of the first gate metal layer (GATE 1) away from the substrate (101), a gate electrode of at least one transistor is arranged in the first gate metal layer (GATE 1).

Abstract: In an array substrate, a control electrode of a driving transistor, a second electrode of a compensation transistor and a second electrode of a first reset transistor are electrically connected to a first conductive connection portion, and a first electrode of the driving transistor and a second electrode of a data writing transistor are electrically connected to a second conductive connection portion. An orthographic projection of a first conductive portion of the first conductive connection portion overlaps with an orthographic projection of a first scan signal line, and overlaps with an orthographic projection of a second scan signal line. A first shielding layer includes a first shielding pattern; in a thickness direction of the substrate, the first shielding pattern is located between the first scan signal line and the first conductive portion, and/or the first shielding pattern is located between the second scan signal line and the first conductive portion.

Abstract: In an array substrate, a control electrode of a driving transistor, a second electrode of a compensation transistor and a second electrode of a first reset transistor are electrically connected to a first conductive connection portion, and a first electrode of the driving transistor and a second electrode of a data writing transistor are electrically connected to a second conductive connection portion. An orthographic projection of a first conductive portion of the first conductive connection portion overlaps with an orthographic projection of a first scan signal line, and overlaps with an orthographic projection of a second scan signal line. A first shielding layer includes a first shielding pattern; in a thickness direction of the substrate, the first shielding pattern is located between the first scan signal line and the first conductive portion, and/or the first shielding pattern is located between the second scan signal line and the first conductive portion.

Abstract: In an array substrate, a control electrode of a driving transistor, a second electrode of a compensation transistor and a second electrode of a first reset transistor are electrically connected to a first conductive connection portion, and a first electrode of the driving transistor and a second electrode of a data writing transistor are electrically connected to a second conductive connection portion. An orthographic projection of a first conductive portion of the first conductive connection portion overlaps with an orthographic projection of a first scan signal line, and overlaps with an orthographic projection of a second scan signal line. A first shielding layer includes a first shielding pattern; in a thickness direction of the substrate, the first shielding pattern is located between the first scan signal line and the first conductive portion, and/or the first shielding pattern is located between the second scan signal line and the first conductive portion.