Abstract: In an array substrate, a control electrode of a driving transistor, a second electrode of a compensation transistor and a second electrode of a first reset transistor are electrically connected to a first conductive connection portion, and a first electrode of the driving transistor and a second electrode of a data writing transistor are electrically connected to a second conductive connection portion. An orthographic projection of a first conductive portion of the first conductive connection portion overlaps with an orthographic projection of a first scan signal line, and overlaps with an orthographic projection of a second scan signal line. A first shielding layer includes a first shielding pattern; in a thickness direction of the substrate, the first shielding pattern is located between the first scan signal line and the first conductive portion, and/or the first shielding pattern is located between the second scan signal line and the first conductive portion.

Abstract: In an array substrate, a control electrode of a driving transistor, a second electrode of a compensation transistor and a second electrode of a first reset transistor are electrically connected to a first conductive connection portion, and a first electrode of the driving transistor and a second electrode of a data writing transistor are electrically connected to a second conductive connection portion. An orthographic projection of a first conductive portion of the first conductive connection portion overlaps with an orthographic projection of a first scan signal line, and overlaps with an orthographic projection of a second scan signal line. A first shielding layer includes a first shielding pattern; in a thickness direction of the substrate, the first shielding pattern is located between the first scan signal line and the first conductive portion, and/or the first shielding pattern is located between the second scan signal line and the first conductive portion.