Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.

Abstract: A method of generating a design for a device is disclosed. The method includes electronically accessing a reference geometry representing the topology, and electronically accessing a source polygonal data model, where the source polygonal data model includes a plurality of source vertices. The method also includes modifying position characteristics of one or more of the source vertices, where the source vertices are modified so that after the source polygonal data model is subdivided, vertices in the subdivided polygonal data model corresponding with the modified source vertices conform to the reference geometry. The method also includes subdividing the source polygonal data model having the modified source vertices to generate the design, where subdividing the source polygonal data model causes vertices in the design to be positioned such that the design conforms with the reference geometry at least partly because of the modified position characteristics of the modified source vertices.

Abstract: A method of generating a design for a device is disclosed. The method includes electronically accessing a scan mesh representing a topology, and electronically accessing a source polygonal data model, where the source polygonal data model includes a plurality of source vertices. The method also includes modifying position characteristics of one or more of the source vertices, where the source vertices are modified so that after the source polygonal data model is subdivided, vertices in the subdivided source polygonal data model corresponding with the modified source vertices conform to the scan mesh. The method also includes subdividing the source polygonal data model having the modified source vertices to generate the design, where subdividing the source polygonal data model causes vertices in the design to be positioned such that the design conforms with the scan mesh at least partly because of the modified position characteristics of the modified source vertices.

Abstract: A method of generating a design for a device is disclosed. The method includes electronically accessing a reference geometry representing the topology, and electronically accessing a source polygonal data model, where the source polygonal data model includes a plurality of source vertices. The method also includes modifying position characteristics of one or more of the source vertices, where the source vertices are modified so that after the source polygonal data model is subdivided, vertices in the subdivided polygonal data model corresponding with the modified source vertices conform to the reference geometry. The method also includes subdividing the source polygonal data model having the modified source vertices to generate the design, where subdividing the source polygonal data model causes vertices in the design to be positioned such that the design conforms with the reference geometry at least partly because of the modified position characteristics of the modified source vertices.

Abstract: Methods and systems for generating surface data from polygonal data are disclosed. The methods and systems receive polygonal data which describe geometries in a mesh. The methods and systems analyze and use the polygonal data to calculate and define a continuous BREP object which accurately represents the original polygonal object.