Patents by Inventor Weifeng Ye

Weifeng Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105444
    Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.
    Type: Application
    Filed: April 26, 2023
    Publication date: March 28, 2024
    Inventors: Jiang LU, Liqi WU, Wei DOU, Weifeng YE, Shih Chung CHEN, Rongjun WANG, Xianmin TANG, Yiyang WAN, Shumao ZHANG, Jianqiu GUO
  • Publication number: 20230377892
    Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method for processing a substrate comprises forming a plasma reaction between titanium tetrachloride (TlCl4), hydrogen (H2), and argon (Ar) in a region between a lid heater and a showerhead of a process chamber or the showerhead and a substrate while providing RF power at a pulse frequency of about 5 kHz to about 100 kHz and at a duty cycle of about 10% to about 20% and flowing reaction products into the process chamber to selectively form a titanium material layer upon a silicon surface of the substrate.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 23, 2023
    Inventors: Yiyang WAN, Weifeng YE, Shumao ZHANG, Gary HOW, Jiang LU, Lei ZHOU, Dien-yeh WU, Douglas LONG, Avgerinos V. GELATOS, Ying-Bing JIANG, Rongjun WANG, Xianmin TANG, Halbert CHONG
  • Patent number: 10707122
    Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: July 7, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sree Rangasai V. Kesapragada, Kevin Moraes, Srinivas Guggilla, He Ren, Mehul Naik, David Thompson, Weifeng Ye, Yana Cheng, Yong Cao, Xianmin Tang, Paul F. Ma, Deenesh Padhi
  • Patent number: 10546742
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: January 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Yana Cheng, Weifeng Ye
  • Publication number: 20190189433
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Application
    Filed: December 31, 2018
    Publication date: June 20, 2019
    Inventors: He REN, Mehul B. NAIK, Yong CAO, Yana CHENG, Weifeng YE
  • Publication number: 20190027403
    Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
    Type: Application
    Filed: September 24, 2018
    Publication date: January 24, 2019
    Inventors: Sree Rangasai V. KESAPRAGADA, Kevin MORAES, Srinivas GUGGILLA, He REN, Mehul NAIK, David THOMPSON, Weifeng YE, Yana CHENG, Yong CAO, Xianmin TANG, Paul F. MA, Deenesh PADHI
  • Patent number: 10170299
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Grant
    Filed: June 18, 2016
    Date of Patent: January 1, 2019
    Assignee: Applied Materials, Inc.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Yana Cheng, Weifeng Ye
  • Patent number: 10109520
    Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: October 23, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sree Rangasai V. Kesapragada, Kevin Moraes, Srinivas Guggilla, He Ren, Mehul Naik, David Thompson, Weifeng Ye, Yana Cheng, Yong Cao, Xianmin Tang, Paul F. Ma, Deenesh Padhi
  • Patent number: 10043709
    Abstract: Methods for selectively depositing a cobalt layer are provided herein. In some embodiments, methods for selectively depositing a cobalt layer include: exposing a substrate to a first process gas to passivate an exposed dielectric surface, wherein the substrate comprises a dielectric layer having an exposed dielectric surface and a metal layer having an exposed metal surface; and selectively depositing a cobalt layer atop the exposed metal surface using a thermal deposition process.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: August 7, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Hua Ai, Jiang Lu, Avgerinos V. Gelatos, Paul F. Ma, Sang Ho Yu, Feng Q. Liu, Xinyu Fu, Weifeng Ye
  • Publication number: 20180144973
    Abstract: Methods to selectively deposit capping layers on a copper surface relative to a dielectric surface comprising separately the copper surface to a cobalt precursor gas and a tungsten precursor gas, each in a separate processing chamber. The copper surface and the dielectric surfaces can be substantially coplanar. The combined thickness of cobalt and tungsten capping films is in the range of about 2 ? to about 60 ?.
    Type: Application
    Filed: November 1, 2017
    Publication date: May 24, 2018
    Inventors: Weifeng Ye, Jiang Lu, Feng Chen, Zhiyuan Wu, Kai Wu, Vikash Banthia, He Ren, Sang Ho Yu, Mei Chang, Feiyue Ma, Yu Lei, Keyvan Kashefizadeh, Kevin Moraes, Paul F. Ma, Hua Ai
  • Patent number: 9633861
    Abstract: Embodiments of the present invention provide processes to selectively form a metal layer on a conductive surface, followed by flowing a silicon based compound over the metal layer to form a metal silicide layer. In one embodiment, a substrate having a conductive surface and a dielectric surface is provided. A metal layer is then deposited on the conductive surface. A metal silicide layer is formed as a result of flowing a silicon based compound over the metal layer. A dielectric is formed over the metal silicide layer.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: April 25, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Weifeng Ye, Mei-yee Shek, Mihaela Balseanu, Xiaojun Zhang, Xiaolan Ba, Yu Jin, Li-Qun Xia
  • Publication number: 20170098575
    Abstract: In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.
    Type: Application
    Filed: October 4, 2016
    Publication date: April 6, 2017
    Inventors: Sree Rangasai V. KESAPRAGADA, Kevin MORAES, Srinivas GUGGILLA, He REN, Mehul NAIK, David THOMPSON, Weifeng YE, Yana CHENG, Yong CAO, Xianmin TANG, Paul F. MA, Deenesh PADHI
  • Patent number: 9580801
    Abstract: Embodiments described herein generally relate to the formation of a UV compatible barrier stack. Methods described herein can include delivering a process gas to a substrate positioned in a process chamber. The process gas can be activated to form an activated process gas, the activated process gas forming a barrier layer on a surface of the substrate, the barrier layer comprising silicon, carbon and nitrogen. The activated process gas can then be purged from the process chamber. An activated nitrogen-containing gas can be delivered to the barrier layer, the activated nitrogen-containing gas having a N2:NH3 ratio of greater than about 1:1. The activated nitrogen-containing gas can then be purged from the process chamber. The above elements can be performed one or more times to deposit the barrier stack.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: February 28, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Xiaolan Ba, Weifeng Ye, Mei-yee Shek, Yu Jin, Li-Qun Xia, Deenesh Padhi, Alexandros T. Demos
  • Publication number: 20170005041
    Abstract: The present disclosure provides an interconnect formed on a substrate and methods for forming the interconnect on the substrate. In one embodiment, the method for forming an interconnect on a substrate includes depositing a barrier layer on the substrate, depositing a transition layer on the barrier layer, and depositing an etch-stop layer on the transition layer, wherein the transition layer shares a common element with the barrier layer, and wherein the transition layer shares a common element with the etch-stop layer.
    Type: Application
    Filed: June 18, 2016
    Publication date: January 5, 2017
    Inventors: He REN, Mehul B. NAIK, Yong CAO, Yana CHENG, Weifeng YE
  • Patent number: 9478460
    Abstract: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: October 25, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mei-yee Shek, Weifeng Ye, Li-Qun Xia, Kang Sub Yim, Kelvin Chan
  • Publication number: 20160141203
    Abstract: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer.
    Type: Application
    Filed: August 10, 2015
    Publication date: May 19, 2016
    Inventors: MEI-YEE SHEK, Weifeng Ye, Li-Qun Xia, Kang Sub Yim, Kelvin Chan
  • Publication number: 20160133563
    Abstract: Methods for selectively depositing a cobalt layer are provided herein. In some embodiments, methods for selectively depositing a cobalt layer include: exposing a substrate to a first process gas to passivate an exposed dielectric surface, wherein the substrate comprises a dielectric layer having an exposed dielectric surface and a metal layer having an exposed metal surface; and selectively depositing a cobalt layer atop the exposed metal surface using a thermal deposition process.
    Type: Application
    Filed: November 3, 2015
    Publication date: May 12, 2016
    Inventors: HUA AI, JIANG LU, AVGERINOS V. GELATOS, PAUL F. MA, SANG HO YU, FENG Q. LIU, XINYU FU, WEIFENG YE
  • Publication number: 20160071724
    Abstract: Embodiments described herein generally relate to the formation of a UV compatible barrier stack. Methods described herein can include delivering a process gas to a substrate positioned in a process chamber. The process gas can be activated to form an activated process gas, the activated process gas forming a barrier layer on a surface of the substrate, the barrier layer comprising silicon, carbon and nitrogen. The activated process gas can then be purged from the process chamber. An activated nitrogen-containing gas can be delivered to the barrier layer, the activated nitrogen-containing gas having a N2:NH3 ratio of greater than about 1:1. The activated nitrogen-containing gas can then be purged from the process chamber. The above elements can be performed one or more times to deposit the barrier stack.
    Type: Application
    Filed: November 7, 2014
    Publication date: March 10, 2016
    Inventors: Xiaolan BA, Weifeng YE, Mei-yee SHEK, Yu JIN, Li-Qun XIA, Deenesh PADHI, Alexandros T. DEMOS
  • Publication number: 20160013049
    Abstract: Embodiments of the present invention generally relate to a method for forming a dielectric barrier layer. The dielectric barrier layer is deposited over a substrate by a plasma enhanced deposition process. In one embodiment, a gas mixture is introduced into a processing chamber. The gas mixture includes a silicon-containing gas, a nitrogen-containing gas, a boron-containing gas, and argon (Ar) gas.
    Type: Application
    Filed: February 18, 2014
    Publication date: January 14, 2016
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Weifeng YE, Mei-yee SHEK, Mihaela BALSEANU, Xiaojun ZHANG, Xiaolan BA, Yu JIN, Li-Qun XIA
  • Patent number: 9105695
    Abstract: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: August 11, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mei-yee Shek, Weifeng Ye, Li-Qun Xia, Kang Sub Yim, Kelvin Chan