Abstract: An integrated semiconductor device includes a substrate, semiconductor circuit layers, a first insulating layer, a second insulating layer, and an interconnection layer. The semiconductor circuit layers are disposed above the substrate. The semiconductor circuit layers have device portions and isolating portions, and the isolating portions are located among the device portions. The first insulating layer is disposed on the semiconductor circuit layers, and the second insulating layer is disposed on the first insulating layer, and the interconnection layer is disposed on the semiconductor circuit layers. The interconnection layer penetrates the first and second insulating layers to electrically connect the device portions of the semiconductor circuit layers. The second insulating layer or the first and second insulating layers collectively form one or more isolating structures above the isolating portion of the semiconductor circuit layers.

Abstract: An integrated semiconductor device includes a substrate, semiconductor circuit layers, an insulating material, and an interconnection layer. The semiconductor circuit layers are disposed above the substrate. The semiconductor circuit layers have device portions and isolating portions, and the isolating portions are located among the device portions. The insulating material is disposed on the semiconductor circuit layers, and the interconnection layer is embedded in the insulating material and electrically connected to the semiconductor circuit layers. The isolating portions provide electrical isolation between adjacent device portions. The interconnection layer has circuits embedded in the insulating material on the device portions. The insulating material has isolating structures raised from top surfaces of the circuits on the device portion, and some of the semiconductor circuit layers form at least one heterojunction.

Abstract: An integrated semiconductor device includes a substrate, semiconductor circuit layers, a first insulating layer, a second insulating layer, and an interconnection layer. The semiconductor circuit layers are disposed above the substrate. The semiconductor circuit layers have device portions and isolating portions, and the isolating portions are located among the device portions. The first insulating layer is disposed on the semiconductor circuit layers, and the second insulating layer is disposed on the first insulating layer, and the interconnection layer is disposed on the semiconductor circuit layers. The interconnection layer penetrates the first and second insulating layers to electrically connect the device portions of the semiconductor circuit layers. The second insulating layer or the first and second insulating layers collectively form one or more isolating structures above the isolating portion of the semiconductor circuit layers.

Abstract: A flip-chip semiconductor package with improved heat dissipation capability and low package profile is provided. The package comprises a heat sink having a plurality of heat dissipation fins and a plurality of heat dissipation leads. The heat dissipation leads are connected to a plurality of thermally conductive vias of a substrate so as to provide thermal conductivity path from the heatsink to the substrate as well as support the heatsink to relieve compressive stress applied to a semiconductor die by the heatsink. The package further comprises an encapsulation layer configured to cover the heat dissipation leads of the heat sink and expose the heat dissipation fins of the heat sink.

Abstract: The present disclosure provides a semiconductor module comprising a semiconductor device removably pressed-fit in a cavity formed in a printed circuit board and methods for manufacturing the same. The semiconductor device and the cavity of the printed circuit board can cooperate with each other and act as an electrical plug and an electrical socket respectively. Soldering the semiconductor device on the printed circuit board can be avoided. Therefore, the packaging process can be more flexible and reliability issues with solder joints can be eliminated. Moreover, heatsink can be mounted on top and/or bottom of the semiconductor device after being received in the cavity of the printed circuit board. Thermal dissipation efficiency can be greatly enhanced.

Abstract: A semiconductor device includes a drain electrode, a first source electrode, a second source electrode, a first gate electrode, and a second gate electrode. The first gate electrode is arranged between the first source electrode and the drain electrode. The first gate electrode extends along a first direction. The second gate electrode is arranged between the second source electrode and the drain electrode. The second gate electrode extends along the first direction. The first gate electrode is arranged above a first imaginary line substantially perpendicular to the first direction in a top view of the semiconductor device and the second gate electrode is arranged below a second imaginary line substantially perpendicular to the first direction in the top view of the semiconductor device.

Abstract: A flip-chip semiconductor package with improved heat dissipation capability and low package profile is provided. The package comprises a heat sink having a plurality of heat dissipation fins and a plurality of heat dissipation leads. The heat dissipation leads are connected to a plurality of thermally conductive vias of a substrate so as to provide thermal conductivity path from the heatsink to the substrate as well as support the heatsink to relieve compressive stress applied to a semiconductor die by the heatsink. The package further comprises an encapsulation layer configured to cover the heat dissipation leads of the heat sink and expose the heat dissipation fins of the heat sink.

Abstract: An integrated semiconductor device includes a substrate, semiconductor circuit layers, an insulating material, and an interconnection layer. The semiconductor circuit layers are disposed above the substrate. The semiconductor circuit layers have device portions and isolating portions, and the isolating portions are located among the device portions. The insulating material is disposed on the semiconductor circuit layers, and the interconnection layer is embedded in the insulating material and electrically connected to the semiconductor circuit layers. The isolating portions provide electrical isolation between adjacent device portions. The interconnection layer has circuits embedded in the insulating material on the device portions. The insulating material has isolating structures raised from top surfaces of the circuits on the device portion, and some of the semiconductor circuit layers form at least one heterojunction.

Abstract: The present disclosure provides a semiconductor module comprising a semiconductor device removably pressed-fit in a cavity formed in a printed circuit board and methods for manufacturing the same. The semiconductor device and the cavity of the printed circuit board can cooperate with each other and act as an electrical plug and an electrical socket respectively. Soldering the semiconductor device on the printed circuit board can be avoided. Therefore, the packaging process can be more flexible and reliability issues with solder joints can be eliminated. Moreover, heatsink can be mounted on top and/or bottom of the semiconductor device after being received in the cavity of the printed circuit board. Thermal dissipation efficiency can be greatly enhanced.

Abstract: Some embodiments of the disclosure provide a semiconductor device. The semiconductor device includes: a substrate having a first side and a second side opposite the first side; a first nitride semiconductor layer disposed on the first side of the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer and having a band gap greater than a band gap of the first nitride semiconductor layer; a first electrode disposed on the second nitride semiconductor layer; a second electrode disposed on the second nitride semiconductor layer; a first semiconductor structure formed adjacent to the second side of the substrate; and a second semiconductor structure formed adjacent to the second side of the substrate; and wherein the first semiconductor structure and the second semiconductor structure are adjacent to each other.