Abstract: A device includes a channel structure, a gate structure, a first source/drain structure, a second source/drain structure, a backside via, a semiconductor structure, and a dielectric layer. The gate structure covers the channel structure. The gate structure includes a gate dielectric layer and at least one metal layer over the gate dielectric layer. The first source/drain structure and the second source/drain structure are on opposite sides and adjacent to sidewalls of the channel structure. The backside via is under the first source/drain structure. The semiconductor structure is under the second source/drain structure. The dielectric layer surrounds the backside via and under the semiconductor structure.

Abstract: A method for manufacturing an integrated circuit (IC) structure is provided. The method includes: etching a first recess and a second recess in a substrate; forming a sacrificial epitaxial plug in the first recess in the substrate; forming a first epitaxial feature and a second epitaxial feature respectively in the first recess and the second recess, wherein the first epitaxial feature is over the sacrificial epitaxial plug; forming a first source/drain epitaxial structure and a second source/drain epitaxial structure over the first epitaxial feature and the second epitaxial feature respectively; forming a gate structure laterally between the first source/drain epitaxial structure and the second source/drain epitaxial structure; removing the sacrificial epitaxial plug and the first epitaxial feature to form a backside via opening exposing a backside of the first source/drain epitaxial structure; and forming a backside via in the backside via opening.

Abstract: An electronic device including a first light source, a second light source, and a light guiding element is provided. The first light source provides a first light. The second light source provides a second light. The light guiding element includes a first microstructure, a second microstructure, and a light emitting surface. The first microstructure faces the first light source. The second microstructure faces the second light source. The first microstructure includes a plurality of first grooves. The first light enters the light guiding element through the first grooves, and exits the light guiding element via the light emitting surface. The second microstructure includes a plurality of second grooves. The second light enters the light guiding element through the second grooves, and exits the light guiding element via the light emitting surface.

Abstract: An electronic device including a first light source, a second light source, and a light guiding element is provided. The first light source provides a first light. The second light source provides a second light. The light guiding element includes a first microstructure, a second microstructure, and a light emitting surface. The first microstructure faces the first light source. The second microstructure faces the second light source. The first microstructure includes a plurality of first grooves. The first light enters the light guiding element through the first grooves, and exits the light guiding element via the light emitting surface. The second microstructure includes a plurality of second grooves. The second light enters the light guiding element through the second grooves, and exits the light guiding element via the light emitting surface.

Abstract: A method for manufacturing an integrated circuit (IC) structure is provided. The method includes: etching a first recess and a second recess in a substrate; forming a sacrificial epitaxial plug in the first recess in the substrate; forming a first epitaxial feature and a second epitaxial feature respectively in the first recess and the second recess, wherein the first epitaxial feature is over the sacrificial epitaxial plug; forming a first source/drain epitaxial structure and a second source/drain epitaxial structure over the first epitaxial feature and the second epitaxial feature respectively; forming a gate structure laterally between the first source/drain epitaxial structure and the second source/drain epitaxial structure; removing the sacrificial epitaxial plug and the first epitaxial feature to form a backside via opening exposing a backside of the first source/drain epitaxial structure; and forming a backside via in the backside via opening.

Abstract: A method for manufacturing an integrated circuit (IC) structure is provided. The method includes: etching a first recess and a second recess in a substrate; forming a sacrificial epitaxial plug in the first recess in the substrate; forming a first epitaxial feature and a second epitaxial feature respectively in the first recess and the second recess, wherein the first epitaxial feature is over the sacrificial epitaxial plug; forming a first source/drain epitaxial structure and a second source/drain epitaxial structure over the first epitaxial feature and the second epitaxial feature respectively; forming a gate structure laterally between the first source/drain epitaxial structure and the second source/drain epitaxial structure; removing the sacrificial epitaxial plug and the first epitaxial feature to form a backside via opening exposing a backside of the first source/drain epitaxial structure; and forming a backside via in the backside via opening.

Abstract: A method for manufacturing an integrated circuit (IC) structure is provided. The method includes: etching a first recess and a second recess in a substrate; forming a sacrificial epitaxial plug in the first recess in the substrate; forming a first epitaxial feature and a second epitaxial feature respectively in the first recess and the second recess, wherein the first epitaxial feature is over the sacrificial epitaxial plug; forming a first source/drain epitaxial structure and a second source/drain epitaxial structure over the first epitaxial feature and the second epitaxial feature respectively; forming a gate structure laterally between the first source/drain epitaxial structure and the second source/drain epitaxial structure; removing the sacrificial epitaxial plug and the first epitaxial feature to form a backside via opening exposing a backside of the first source/drain epitaxial structure; and forming a backside via in the backside via opening.

Abstract: A device includes a fin extending from a substrate; a gate stack over and along sidewalls of the fin; a gate spacer along a sidewall of the gate stack; an epitaxial source/drain region in the fin and adjacent the gate spacer, the epitaxial source/drain region including a first epitaxial layer on the fin, the first epitaxial layer including silicon and arsenic; and a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including silicon and phosphorus, the first epitaxial layer separating the second epitaxial layer from the fin; and a contact plug on the second epitaxial layer.

Abstract: A thermal properties measuring device is for measuring a thermal property of an object to be measured. The thermal properties measuring device includes a heating element, a measurement window, and at least one thermometer. The heating element is configured to be heated to a first temperature. The measurement window and the heating element are disposed according to a specific geometric relationship. The measurement window is configured to provide a heat transfer path between the object and the heating element. The thermometer is configured to measure an initial temperature of the to-be-measured object, and to measure a measured temperature after the heating element is heated. The measured temperature of the object is different from the initial temperature of the object. The thermal property of the object is associated with the specific geometric relationship, the first temperature, the initial temperature, the measured temperature and an environment temperature.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a first fin structure and a second fin structure over a substrate. The semiconductor device structure also includes a gate structure over the first and second fin structure. The semiconductor device structure further includes a source/drain structure over the first and second fin structure. The source/drain structure includes a first semiconductor layer over the first fin structure and a second semiconductor layer over the second fin structure. The source/drain structure also includes a third semiconductor layer covering the first and second semiconductor layers. The third semiconductor layer has a surface with [110] plane orientation.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a first fin structure and a second fin structure over a substrate. The semiconductor device structure also includes a gate structure over the first and second fin structure. The semiconductor device structure further includes a source/drain structure over the first and second fin structure. The source/drain structure includes a first semiconductor layer over the first fin structure and a second semiconductor layer over the second fin structure. The source/drain structure also includes a third semiconductor layer covering the first and second semiconductor layers. The third semiconductor layer has a surface with [110] plane orientation.

Abstract: A thermal properties measuring device is for measuring a thermal property of an object to be measured. The thermal properties measuring device includes a heating element, a measurement window, and at least one thermometer. The heating element is configured to be heated to a first temperature. The measurement window and the heating element are disposed according to a specific geometric relationship. The measurement window is configured to provide a heat transfer path between the object and the heating element. The thermometer is configured to measure an initial temperature of the to-be-measured object, and to measure a measured temperature after the heating element is heated. The measured temperature of the object is different from the initial temperature of the object. The thermal property of the object is associated with the specific geometric relationship, the first temperature, the initial temperature, the measured temperature and an environment temperature.

Abstract: A method of building a stereoscopic model with Kalman filtering (KF) is provided. The method entails capturing images of the environment with a sensing device to build the stereoscopic model and then correcting a static object and a dynamic object in the environmental images with Kalman filtering to enhance the accuracy of the stereoscopic model. The prior art is a great reduction of accuracy in simultaneous localization and mapping (SLAM) in the event of increased system variation, increased complexity, or increased involved field. The method overcomes a drawback of the prior art.

Abstract: A method of building a stereoscopic model with Kalman filtering (KF) is provided. The method entails capturing images of the environment with a sensing device to build the stereoscopic model and then correcting a static object and a dynamic object in the environmental images with Kalman filtering to enhance the accuracy of the stereoscopic model. The prior art is a great reduction of accuracy in simultaneous localization and mapping (SLAM) in the event of increased system variation, increased complexity, or increased involved field. The method overcomes a drawback of the prior art.