Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.

Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.

Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.

Abstract: Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.

Abstract: A phase doubler driver circuit includes first control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to an input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal.

Abstract: A pulse width modulation (PWM) modulator for a multiphase power converter and related adaptive firing order (AFO) method includes a multiphase leading edge generator having pulse generating circuitry associated with each of the regulator phases, wherein the pulse generating circuitry generates phase pulses associated with each of the phases. An adaptive firing order (AFO) controller having circuitry including a mixer receives and sums the phase pulses into a summing signal and uses the summing signal to generate a series of turn-on pulses therefrom. A multiphase PWM generator has inputs coupled to an output of the AFO controller coupled to receive the series of turn-on pulses, the multiphase PWM generator having circuitry for generating said PWM signals therefrom. An adaptive firing order (AFO) controlled multi-phase power converter includes a plurality of parallel connected regulator phases controlled by respective pulse width modulation (PWM) signals provided by the PWM modulator.

Abstract: A high performance single stage Power Factor Correction (PFC) converter with tight output voltage regulation and a very simple circuit to carry out those functions, which means its cost is lower than its counterparts. Two basic flyback circuits include a simple control circuit. For the hard switching circuit, only one switch is used to achieve low cost; for the soft switching scheme, one auxiliary switch is added to get higher efficiency and smaller size. There are two power flow paths, resulting in part power processed by an active switch only once to reduce the current stress and improve the efficiency. A direct current (DC) bus voltage will be limited to the peak value of input voltage. The maximum DC bus voltage will be less than 400 and a single commercial capacitor can be used for universal voltage stress under light load condition.

Abstract: A high performance single stage Power Factor Correction (PFC) converter with tight output voltage regulation and a very simple circuit to carry out those functions, which means its cost is lower than its counterparts. Two basic flyback circuits include a simple control circuit. For the hard switching circuit, only one switch is used to achieve low cost; for the soft switching scheme, one auxiliary switch is added to get higher efficiency and smaller size. There are two power flow paths, resulting in part power processed by an active switch only once to reduce the current stress and improve the efficiency. A direct current (DC) bus voltage will be limited to the peak value of input voltage. The maximum DC bus voltage will be less than 400 and a single commercial capacitor can be used for universal voltage stress under light load condition.