Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for data detection.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.

Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for data processing systems with symbol selective scaling interacting with parity forcing.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit having a data detection circuit is disclosed that includes: a scaling circuit, a soft output calculation circuit, and a factor calculation circuit. The scaling circuit is operable to scale a branch metric value by a scaling factor to yield a scaled output. The soft output calculation circuit is operable to calculate a soft output based at least in part on the scaled output. The factor calculation circuit operable to modify the scaling factor based at least in part on the soft output.

Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for priority based data processing with soft guaranteed global processing iterations.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a data transfer system is disclosed that includes a data detector, a defect detector and a gating circuit. The data detector provides a soft output, and the defect detector is operable to receive the soft output and the data signal, and to assert a defect indication based at least in part on the soft output and the data signal. The gating circuit is operable to modify the soft output of the detector whenever the defect indication is asserted.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. Such systems and methods may include data pre-processing and detection to identify a media defect.

Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry is configured to: equalize an oversampled digital data signal to determine an equalized digital data signal, filter the equalized digital data signal, determine a hard decision and reliability of the filtered digital data signal, and decode the filtered digital data signal based at least in part on the hard decision and reliability. The oversampled digital data signal comprises a first set of sampled digital data and a corresponding second set of sampled digital data, each of the samples in the first set of sampled digital data being offset from a corresponding one of the sample in the second set of sampled digital data by a phase difference.

Abstract: An apparatus comprises read channel circuitry and associated signal processing circuitry. The signal processing circuitry comprises: an equalizer configured to combine an output of two or more component filters into a single equalized data signal; a detector with an input coupled to an output of the equalizer configured to determine a set of soft outputs, hard decision information and reliability indicators of the single equalized data signal; a decoder with an input coupled to an output of the decoder configured to perform an iterative decoding process using the set of soft outputs, hard decision information and reliability indicators to determine a decoded data signal; and a multiplexer with a first input coupled to an output of the decoder, a second input coupled to an output of the detector, and an output coupled to an input of the equalizer. The hard decision information is used to train the equalizer.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a decoder circuit providing a decoded output, and a dynamic scalar calculation circuit that determines a first dynamic scaling value and a second dynamic scaling value based at least in part on the decoded output. A first multiplier circuit multiplies the decoded output by the first dynamic scaling value and provides a first scaled output. A detector circuit receives the first scaled output and provides a detected output. A second multiplier circuit multiplies the detected output by the second dynamic scaling value and provides a second scaled output.

Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry is configured to determine a first set of soft outputs, hard decisions and reliability indicators for a read channel data signal, to determine a second set of soft outputs, hard decisions and reliability indicators based at least in part on the first set of soft outputs, hard decisions and reliability indicators, and to perform an iterative decoding process to decode the read channel data signal based at least in part on the second set of soft outputs, hard decisions and reliability indicators. The first set of soft outputs, hard decisions and reliability indicators are used to determine a reduced-state trellis for determining the second set of soft outputs, hard decisions and reliability indicators.

Abstract: An apparatus comprises read channel circuitry and associated signal processing circuitry. The signal processing circuitry comprises: an equalizer configured to combine an output of two or more component filters into a single equalized data signal; a detector with an input coupled to an output of the equalizer configured to determine a set of soft outputs, hard decision information and reliability indicators of the single equalized data signal; a decoder with an input coupled to an output of the detector configured to perform an iterative decoding process using the set of soft outputs, hard decision information and reliability indicators to determine a decoded data signal; and a multiplexer with a first input coupled to an output of the decoder, a second input coupled to an output of the detector, and an output coupled to an input of the equalizer. The hard decision information is used to train the equalizer.

Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry is configured to: equalize an oversampled digital data signal to determine an equalized digital data signal, filter the equalized digital data signal, determine a hard decision and reliability of the filtered digital data signal, and decode the filtered digital data signal based at least in part on the hard decision and reliability. The oversampled digital data signal comprises a first set of sampled digital data and a corresponding second set of sampled digital data, each of the samples in the first set of sampled digital data being offset from a corresponding one of the sample in the second set of sampled digital data by a phase difference.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a noise predictive filter circuit, a mean calculation circuit, a summation circuit, and a filter tap adaptation circuit. The noise predictive filter circuit is operable to perform a noise predictive filtering process on a data input based upon a selector input to yield a noise predictive output. The selector input is derived from a data detector output. The mean calculation circuit is operable to average two or more instances of the noise predictive output to yield a mean output. The summation circuit is operable to subtract the mean output from the noise predictive output to yield a sum output. The filter tap adaptation circuit is operable to adaptively calculate a filter tap based at least in part on a value derived from the data input and a value derived from the sum output.

Abstract: Various embodiments of the present invention provide systems and methods for deriving data from a defective media region. As an example, a method for deriving data from a defective media region is disclosed that includes providing a storage medium and performing a media defect detection that indicates a defective region on the storage medium. A first data decode is performed on data corresponding to the defective region. The first data decode yields a first output. It is determined that the first output failed to converge and based at least in part on the failure of the first output to converge, a second data decode is performed on the data corresponding to the defective region. The second data decode includes zeroing out any soft data corresponding to the defective region and providing a second output.

Abstract: Read channel circuitry comprises a decoder and error correction circuitry. The error correction circuitry is configured to calibrate a first set of filters using a read channel data signal, to determine first hard decision information regarding the read channel data signal using the calibrated first set of filters, to determine an error corrected read channel data signal using the first hard decision information, to calibrate a second set of filters using the error corrected read channel data signal, to determine second hard decision information regarding the error corrected read channel data signal using the calibrated second set of filters, and to decode the second hard decision information. The first set of filters and the second set of filters are calibrated in respective first and second calibrators.

Abstract: Read channel circuitry comprises a decoder and error correction circuitry. The error correction circuitry is configured to calibrate a first set of filters using a read channel data signal, to determine first hard decision information regarding the read channel data signal using the calibrated first set of filters, to determine an error corrected read channel data signal using the first hard decision information, to calibrate a second set of filters using the error corrected read channel data signal, to determine second hard decision information regarding the error corrected read channel data signal using the calibrated second set of filters, and to decode the second hard decision information. The first set of filters and the second set of filters are calibrated in respective first and second calibrators.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. Data pre-processing is operable to pre-process a symbol based detected output to yield a suspect symbol indicator, and data detection is operable to provide a defect indicator corresponding to a probable defect identified based on the suspect symbol indicator.

Abstract: Various systems and methods for media defect detection.