Patents by Inventor Wei-Kang Liu
Wei-Kang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250224563Abstract: A semiconductor device for optical signal transmitting includes a substrate and a silicon structure. The silicon structure is formed on a surface of the substrate, wherein the silicon structure comprises an upper surface, a lower surface, and side surfaces between the upper surface and the lower surface, the lower surface is in contact with the surface of the substrate. A plurality of first intermediate surfaces is between the lower surface and the side surfaces, and a plurality of second intermediate surfaces is between the upper surface and the side surfaces. The plurality of first intermediate surfaces is formed at different angles than the side surfaces, and the plurality of second intermediate surfaces is formed at different angles than the side surfaces.Type: ApplicationFiled: January 9, 2024Publication date: July 10, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Te-Hsien Hsieh, Shih-Wei Lin, Hau-Yan Lu, Wei-Kang Liu
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Patent number: 12332478Abstract: A photonic device and related method for forming a photonic device. In some embodiments, a method of fabricating a photonic device includes forming a layer stack over a substrate. In some cases, the layer stack includes a lower cladding layer, a core layer disposed over the lower cladding layer, and an upper cladding layer disposed over the core layer. In some examples, the method further includes patterning the layer stack to form a waveguide for the photonic device. In some cases, the waveguide includes the core layer, and the core layer includes a lateral surface having a convex profile.Type: GrantFiled: June 7, 2022Date of Patent: June 17, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yuan-Sheng Huang, Wei-Kang Liu
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Publication number: 20250164691Abstract: A semiconductor structure includes a waveguide and an optical attenuator. The waveguide is disposed over an insulating layer and configured to guide light. The optical attenuator is connected to the waveguide. The optical attenuator has a first surface and a second surface opposite the first surface, and a cross-sectional width of the optical attenuator decreases from the first surface to the second surface.Type: ApplicationFiled: January 22, 2025Publication date: May 22, 2025Inventors: WEI-KANG LIU, LEE-SHIAN JENG, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
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Publication number: 20250102734Abstract: A semiconductor photonics device includes a plurality of grating couplers, each configured to couple a particular wavelength (or wavelength range) of an optical signal to a waveguide of the semiconductor photonics device. In some implementations, various implementations of optical signal splitters or filters described herein enable respective wavelengths (or respective wavelength ranges) to be passed to each of the grating couplers (while filtering out other wavelengths or other wavelength ranges), thereby enabling the grating couplers to each handle a respective wavelength (or respective wavelength range). This enables multiple wavelengths (or multiple wavelength ranges) to be distributed across multiple grating couplers, which may increase the bandwidth of the semiconductor photonics device relative to a semiconductor photonics device that includes only a single grating coupler.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Inventors: Chih-Tsung SHIH, Wei-kang LIU, Hau-Yan LU, Chi-Yuan SHIH, Ming-Fa CHEN, YingKit Felix TSUI
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Patent number: 12235490Abstract: A semiconductor structure includes a waveguide and an optical attenuator. The waveguide is disposed over an insulating layer and configured to guide light. The optical attenuator is connected to the waveguide. The optical attenuator has a first surface and a second surface opposite the first surface, and a cross-sectional width of the optical attenuator decreases from the first surface to the second surface.Type: GrantFiled: July 1, 2022Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Wei-Kang Liu, Lee-Shian Jeng, Chih-Tsung Shih, Hau-Yan Lu, Yingkit Felix Tsui
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Publication number: 20250044518Abstract: An edge coupler includes a substrate, a first cladding layer over the substrate, a core layer over the first cladding layer, and an ARC layer. The substrate has a first sidewall, the first cladding layer has a second sidewall aligned with the first sidewall, and the core layer has a third sidewall aligned with the second sidewall. The ARC layer lines the first sidewall, the second sidewall and the third sidewall. The ARC layer physically contacts and covers a surface of the substrate. A first height of the ARC layer varies along the surface of the substrate.Type: ApplicationFiled: October 22, 2024Publication date: February 6, 2025Inventors: WEI-KANG LIU, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
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Publication number: 20240418941Abstract: A method of forming a grating coupler includes: providing an initial design layout of the grating coupler, wherein the initial design layout includes: a taper section, comprising a pair of tapers; and a grating section coupled to the taper section, the grating section having an array of gratings, wherein the gratings includes gradually changing shapes, from a top-view perspective, from a first non-convex octagonal shape of a central grating, at a center of the grating section, of one of a second non-convex octagonal shape, a convex octagonal shape, and a quadrilateral shape, to an edge grating near an edge of the grating section. The method further includes: converting the initial design layout into a revised design layout through an optical proximity correction operation; and manufacturing the grating coupler using the revised design layout.Type: ApplicationFiled: June 14, 2023Publication date: December 19, 2024Inventors: CHENG-TSE TANG, WEI-KANG LIU, HAU-YAN LU, YINGKIT FELIX TSUI
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Patent number: 12153261Abstract: An edge coupler, a waveguide structure and a method for forming a waveguide structure are provided. The edge coupler includes a substrate, a first cladding layer, a core layer and a first anti-reflection coating layer. The first cladding layer has a second sidewall aligned with a first sidewall of the substrate. The core layer has a third sidewall aligned with the second sidewall. The anti-reflection coating layer lines the first sidewall, the second sidewall and the third sidewall. A thickness of the anti-reflection coating layer varies along the first sidewall, the second sidewall and the third sidewall.Type: GrantFiled: July 13, 2022Date of Patent: November 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Wei-Kang Liu, Chih-Tsung Shih, Hau-Yan Lu, Yingkit Felix Tsui
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Publication number: 20240385372Abstract: An edge coupler has a wide end, a narrow end, and a tapering thickness. The narrow end is coupled to a waveguide in a photonic integrated circuit (PIC). The wide end is coupled to an optical transmitter or receiver. The edge coupler thickens by tapering downward into the buried oxide layer of a BOX substrate. An upper surface of the edge coupler may be planar. A pedestal may be formed in the oxide layer so that a laser diode mounted on the pedestal will be vertically aligned to the edge coupler. Alternatively, the pedestal may be formed in a substrate under the oxide layer so that the core of an optical fiber mounted on the pedestal will be vertically aligned to the edge coupler. The pedestal may be in a cavity that facilitates horizontal alignment between the laser diode, optical fiber, or other such device and the edge coupler.Type: ApplicationFiled: May 19, 2023Publication date: November 21, 2024Inventors: Hau-Yan Lu, Wei-Kang Liu, Yingkit Felix Tsui
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Publication number: 20240369764Abstract: A semiconductor structure includes a grating coupler structure, a circuit component separated from the grating coupler structure, an inter level dielectric layer, a capping layer over the inter level dielectric layer, and a passivation layer over the capping layer. The inter level dielectric layer has a first refractive index, the capping layer has second refractive index, and the passivation layer has a third refractive index. The second refractive index is greater than the first refractive index, and is greater than the third refractive index.Type: ApplicationFiled: July 21, 2024Publication date: November 7, 2024Inventors: CHIH-TSUNG SHIH, WEI-KANG LIU, SUI-YING HSU, JING-HWANG YANG, YINGKIT FELIX TSUI
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Publication number: 20240361524Abstract: Some implementations described herein include a photonics integrated circuit device including a photonics structure. The photonics structure includes a waveguide structure and an optical attenuator structure. In some implementation, the optical attenuator structure is formed on an end region of the waveguide structure and includes a metal material or a doped material. In some implementations, the optical attenuator structure includes a gaussian doping profile within a portion of the waveguide structure. The optical attenuator structure may absorb electromagnetic waves at the end of the waveguide structure with an efficiency that is improved relative to a spiral optical attenuator structure or metal cap optical attenuator structure.Type: ApplicationFiled: July 8, 2024Publication date: October 31, 2024Inventors: Wei-kang LIU, Chih-Tsung SHIH, Hau-Yan LU, YingKit Felix TSUI, Lee-Shian JENG
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Publication number: 20240353625Abstract: Some embodiments relate to an integrated chip (IC) including a handle substrate; a semiconductor layer comprising a grating coupler region and an edge coupler region; an insulative layer between the handle substrate and the semiconductor layer; a grating coupler in the grating coupler region comprising a plurality of trenches arranged in the semiconductor layer; and an edge coupler in the edge coupler region of the semiconductor layer including: a base structure having an end proximate to an edge of the insulative layer, and tapered sidewalls extending laterally from the end; and an upper structure extending over the base structure, the upper structure having an end proximate to the edge of the insulative layer, and tapered sidewalls extending laterally from the end between the tapered sidewalls of the base structure; where the handle substrate continuously extends from directly beneath the plurality of trenches to directly beneath the upper structure.Type: ApplicationFiled: April 18, 2023Publication date: October 24, 2024Inventors: Hau-Yan Lu, Wei-Kang Liu, Yingkit Felix Tsui
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Patent number: 12124083Abstract: A semiconductor structure includes a substrate, a grating coupler structure over the substrate, a multi-layers film structure over the grating coupler structure. The multi-layers film structure include a first layer including a first refractive index, a second layer over the first layer and including a second refractive index and a third layer over the second layer and including a third refractive index. The second refractive index is greater than the first refractive index and is greater than the third refractive index of the third layer, and a thickness of each layer of the multi-layers film structure is within a range from ?/4 to ?2, ? is a wavelength of light.Type: GrantFiled: August 3, 2022Date of Patent: October 22, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chih-Tsung Shih, Wei-Kang Liu, Sui-Ying Hsu, Jing-Hwang Yang, Yingkit Felix Tsui
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Publication number: 20240345320Abstract: Various embodiments of the present disclosure are directed towards a photonic device including a temperature adjustment element. A first waveguide overlies an insulating layer. A second waveguide overlies the insulating layer. The temperature adjustment element includes a heater structure aligned with a segment of the first waveguide and a cooler structure aligned with a segment of the second waveguide. The heater structure is configured to increase a temperature of the segment of the first waveguide to a first temperature. The cooler structure is configured to reduce a temperature of the segment of the second waveguide to a second temperature less than the first temperature.Type: ApplicationFiled: April 14, 2023Publication date: October 17, 2024Inventors: Wei-Kang Liu, Hau-Yan Lu, Yingkit Felix Tsui
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Publication number: 20240329298Abstract: An integrated chip including a base dielectric layer and a multi-tiered semiconductor waveguide layer over the base dielectric layer. The multi-tiered semiconductor waveguide layer has a first waveguide tier having a first width at a first height over the base dielectric layer. The multi-tiered semiconductor waveguide layer has a second waveguide tier having a second width, greater than the first width, at a second height, less than the first height, over the base dielectric layer. A cladding layer is over the multi-tiered semiconductor waveguide layer. A multi-tiered conductive heater layer is over the cladding layer. The multi-tiered conductive heater layer has a first heater tier over the first waveguide tier. The multi-tiered conductive heater layer has a pair of second heater tiers at the first height, over the second waveguide tier, and on opposite sides of the first waveguide tier.Type: ApplicationFiled: April 3, 2023Publication date: October 3, 2024Inventors: Wei-Kang Liu, Hau-Yan Lu, Ying Kit Felix Tsui
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Publication number: 20240310579Abstract: A method for forming an optical waveguide structure includes following operations. A substrate is received. A semiconductor layer is formed on the substrate. The semiconductor layer is patterned to form at least a waveguide in the substrate and at least a trench in the semiconductor layer. A first gap-filling operation is performed to form a first dielectric portion in the trench. A second gap-filling operation is performed to form a second dielectric portion over the first dielectric portion. An air seam is sealed within the second dielectric portion. A third gap-filling operation is performed to form a third dielectric portion over the second dielectric portion.Type: ApplicationFiled: May 24, 2024Publication date: September 19, 2024Inventors: CHIH-TSUNG SHIH, HAU-YAN LU, WEI-KANG LIU, YINGKIT FELIX TSUI
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Patent number: 12085751Abstract: Some implementations described herein include a photonics integrated circuit device including a photonics structure. The photonics structure includes a waveguide structure and an optical attenuator structure. In some implementation, the optical attenuator structure is formed on an end region of the waveguide structure and includes a metal material or a doped material. In some implementations, the optical attenuator structure includes a gaussian doping profile within a portion of the waveguide structure. The optical attenuator structure may absorb electromagnetic waves at the end of the waveguide structure with an efficiency that is improved relative to a spiral optical attenuator structure or metal cap optical attenuator structure.Type: GrantFiled: July 8, 2022Date of Patent: September 10, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-kang Liu, Chih-Tsung Shih, Hau-Yan Lu, YingKit Felix Tsui, Lee-Shian Jeng
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Publication number: 20240264371Abstract: Various embodiments of the present disclosure are directed towards a semiconductor package comprising optically coupled integrated circuit (IC) chips. A first IC chip and a second IC chip overlie a substrate at a center of the substrate. A photonic chip overlies the first and second IC chips and is electrically coupled to the second IC chip. A laser device chip overlies the substrate, adjacent to the photonic chip and the second IC chip, at a periphery of the substrate. The photonic chip is configured to modulate a laser beam from the laser device chip in accordance with an electrical signal from the second IC chip and to provide the modulated laser beam to the first IC chip. This facilitates optical communication between the first IC chip to the second IC chip. Various embodiments of the present disclosure are further directed towards simultaneously aligning and bonding constituents of the semiconductor package.Type: ApplicationFiled: April 3, 2024Publication date: August 8, 2024Inventors: Chih-Tsung Shih, Hau-Yan Lu, Wei-Kang Liu, Yingkit Felix Tsui
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Patent number: 12025835Abstract: An optical waveguide structure of a semiconductor photonic device includes a first semiconductor waveguide, a second semiconductor waveguide, and an air seam between the first and second semiconductor waveguides. The semiconductor waveguides extend in a first direction, and a plurality of air seams extend in a second direction. Each of the air seams is disposed between two adjacent semiconductor waveguides. A distance between the two adjacent semiconductor waveguides is less than a width of each semiconductor waveguide.Type: GrantFiled: August 3, 2022Date of Patent: July 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chih-Tsung Shih, Hau-Yan Lu, Wei-Kang Liu, Yingkit Felix Tsui
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Patent number: 11977256Abstract: Various embodiments of the present disclosure are directed towards a semiconductor package comprising optically coupled integrated circuit (IC) chips. A first IC chip and a second IC chip overlie a substrate at a center of the substrate. A photonic chip overlies the first and second IC chips and is electrically coupled to the second IC chip. A laser device chip overlies the substrate, adjacent to the photonic chip and the second IC chip, at a periphery of the substrate. The photonic chip is configured to modulate a laser beam from the laser device chip in accordance with an electrical signal from the second IC chip and to provide the modulated laser beam to the first IC chip. This facilitates optical communication between the first IC chip to the second IC chip. Various embodiments of the present disclosure are further directed towards simultaneously aligning and bonding constituents of the semiconductor package.Type: GrantFiled: May 23, 2022Date of Patent: May 7, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Tsung Shih, Hau-Yan Lu, Wei-Kang Liu, Yingkit Felix Tsui