Abstract: A semiconductor wafer is prepared with the silicon {111} crystalline plane parallel to the major surfaces of the wafer. After preparation of the wafer with the desired {111} crystalline plane orientation, integrated circuit semiconductor dies may be defined in one of the major surfaces of the wafer. Stress defects may then be formed in the wafer in a {111} crystalline plane at a depth corresponding to the final thickness of the wafer. Cracks propagate from the stress defects in the plane of the stress defects, effectively cleaving the wafer in two at the desired finished thickness of the wafer.

Abstract: A semiconductor die, such as a flip-chip die, has a stairstep configuration, which reduces or eliminates the risk of an occurrence of an epoxy on die phenomenon. The stairstep configuration of the semiconductor die is formed during a multi-cut wafer dicing process associated with a semiconductor die fabrication process. During the multi-cut wafer dicing process, a first cutting device, having a first width, forms a first cut in the wafer. The first cut extends partially through the wafer. A second cutting device, having a second width, forms a second cut within the first cut. The combination of the first cut and the second cut form the stairstep configuration of the semiconductor die.

Abstract: A semiconductor package includes a substrate having a top planar surface and a semiconductor die mounted on the top planar surface of the substrate. Bond wires electrically connect the semiconductor die to the substrate. Flow control dams are integrally formed with the top planar surface of the substrate and each flow control dam protrudes from the top planar surface of the substrate at a location proximate to the bond wires. The flow control dams reduce the occurrence of wire sweep in the bond wires electrically connected to the substrate and semiconductor die.

Abstract: A semiconductor device package includes a first substrate having an electrical circuit, semiconductor dies stacked one on top of the other, and bond wires electrically connected one to another. The bond wires electrically couple the semiconductor dies to one another and to the electrical circuit. There is a first bond wire having a first portion connected to a first semiconductor die, a second portion connected to a second semiconductor die, and an intermediate portion between the first portion and second portion. The semiconductor device package further includes a molding compound encapsulating the semiconductor dies, and the first and second portions of the first bond wire. The intermediate portion of the first bond wire is exposed along a top planar surface of the molding compound. The semiconductor device package may be used for coupling one or more other semiconductor device packages thereto via the exposed intermediate portion.

Abstract: The present disclosure generally relates to ensuring a plasma plume or cloud that forms during a laser cutting process does not lead to undesired re-deposition of material onto the substrate. At least one electrode is biased to draw the electrons of the plasma plume or cloud towards the electrode and away from the substrate. A vacuum port and/or a blower may be strategically located to ensure proper gas flow away from the substrate and hence, directing of the electrons away from the substrate. In so doing, material re-deposition is less likely to occur.

Abstract: A die separation ring that causes non-uniform expansion of a semiconductor wafer during a semiconductor wafer expansion process. The die separation ring includes an annular body that extends about a central axis. The annular body of the die separation ring includes a first portion having a first elevation and a second portion having a second elevation that is lower than the first elevation. A third portion extends between the first portion and the second portion forming a transition between the first portion and the second portion.

Abstract: A semiconductor device package includes a first substrate having an electrical circuit, semiconductor dies stacked one on top of the other, and bond wires electrically connected one to another. The bond wires electrically couple the semiconductor dies to one another and to the electrical circuit. There is a first bond wire having a first portion connected to a first semiconductor die, a second portion connected to a second semiconductor die, and an intermediate portion between the first portion and second portion. The semiconductor device package further includes a molding compound encapsulating the semiconductor dies, and the first and second portions of the first bond wire. The intermediate portion of the first bond wire is exposed along a top planar surface of the molding compound. The semiconductor device package may be used for coupling one or more other semiconductor device packages thereto via the exposed intermediate portion.

Abstract: A semiconductor device package includes a multi-layer substrate including a bottom layer and a top layer. One or more dies are mounted on and electrically coupled to the top layer of the substrate. An electromagnetic interference (EMI) shield encapsulates the substrate and the semiconductor dies. A first plurality of conductive stubs is positioned around edges of the top layer of the substrate. Each of the conductive stubs includes an edge portion having a first thickness and in contact with the EMI shield. A second plurality of conductive stubs is positioned around edges of the bottom layer of the substrate. Each of the second plurality of conductive stubs includes an edge portion having a second thickness less than the first thickness and in contact with the EMI shield.

Abstract: A semiconductor package includes a substrate having a top planar surface and a semiconductor die mounted on the top planar surface of the substrate. Bond wires electrically connect the semiconductor die to the substrate. Flow control dams are integrally formed with the top planar surface of the substrate and each flow control dam protrudes from the top planar surface of the substrate at a location proximate to the bond wires. The flow control dams reduce the occurrence of wire sweep in the bond wires electrically connected to the substrate and semiconductor die.

Abstract: A device may include a fan-out structure that has a plurality of integrated circuits. The integrated circuits may be of different types, such as by being configured differently or configured to perform different functions. The fan-out structure may be coupled to another integrated circuit structure, such as a die stack. For example, the fan-out structure may be coupled to a top surface or a bottom surface of the integrated circuit structure, or may otherwise be disposed within a vertical profile defined by the integrated circuit structure. Horizontally-extending and vertically-extending paths may be disposed in between and around the combined fan-out structure and integrated circuit structure to enable the integrated circuits of the two structures to communicate.

Abstract: A device may include a fan-out structure that has a plurality of integrated circuits. The integrated circuits may be of different types, such as by being configured differently or configured to perform different functions. The fan-out structure may be coupled to another integrated circuit structure, such as a die stack. For example, the fan-out structure may be coupled to a top surface or a bottom surface of the integrated circuit structure, or may otherwise be disposed within a vertical profile defined by the integrated circuit structure. Horizontally-extending and vertically-extending paths may be disposed in between and around the combined fan-out structure and integrated circuit structure to enable the integrated circuits of the two structures to communicate.

Abstract: A memory device including graphical content and a method of making the memory device with graphical content are disclosed. The graphical content is formed on a release media. The release media and the unencapsulated memory device are placed in a mold and encapsulated. During the encapsulation and curing of the molding compound, the graphical content is transferred from the release media to the encapsulated memory device.

Abstract: A memory device including graphical content and a method of making the memory device with graphical content are disclosed. The graphical content is formed on a release media. The release media and the unencapsulated memory device are placed in a mold and encapsulated. During the encapsulation and curing of the molding compound, the graphical content is transferred from the release media to the encapsulated memory device.